CPU Pre-Si Verification Engineer

Intel

Región Centro

Híbrido

MXN 420.000 - 780.000

Jornada completa

Hace 3 días
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Descripción de la vacante

The Intel E-Core CPU team in Guadalajara, Mexico is seeking a pre-silicon verification engineer to verify new and existing features for Intel's next generation CPU IP. You will develop test benches, run simulations, debug bugs, and drive coverage goals in a cross-site team.

Ideal candidates have 3+ years in HDL verification, strong programming skills, and excellent English. This role offers a hybrid work model in Mexico with opportunities to grow in a world-class hardware group.

Formación

  • Experience in pre-Si verification and HDL verification of CPU or similar IP.
  • Strong programming skills in C/C++, Python, and scripting for test automation.
  • Excellent English communication and problem-solving abilities.

Responsabilidades

  • Develop pre-Si validation test plans and test scenarios for CPU IP.
  • Develop components for a simulation environment: BFM, trackers, checkers, scoreboards, test benches.
  • Perform and debug digital simulations and drive bug closure.
  • Develop functional coverage and meet coverage goals.
  • Collaborate with design engineers and micro-architects to ensure high-quality tests.

Conocimientos

Verilog/SystemVerilog/UVM
C/C++
Python
Advanced English
Debugging

Educación

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Herramientas

VHDL/Verilog/SystemVerilog
UVM/OVM
JasperGold
Questa Formal

Descripción del empleo

Job Details
Job Description: The world is transforming and so is Intel. Here at Intel, we believe the world needs technology that can enrich the lives of every person on Earth. The E-Core CPU team is a CPU Core development team in Guadalajara, Mexico. We believe that developing these technologies takes a team of exceptionally talented individuals who work together to visualize, innovate, and make the future of computing possible. If you are excited about advanced development of breakthrough technologies for future-generation CPU cores, we welcome you to join us, to do something wonderful. The focus of this role is to be part of a team of pre-silicon verification engineers to verify new and existing features for Intel's next generation CPU IP resulting in bug free final design. You will be responsible for exhaustively validating the RTL implementation of new architecture and microarchitecture capabilities using a combination of standalone and top-level test environments as well as formal verification. This team is responsible to ensure the highest quality of Intel's CPU designs, in a dynamic cross-team environment.
Role Responsibilities Include Although Not Limited To
  • Developing pre-Si validation test plans and test scenarios to prove the correctness of the design.
  • Development of components for a simulation-based environment: bus functional models, trackers, checkers, scoreboards, and test benches.
  • Performing and debugging digital simulations and driving to closure of bugs.
  • Development of functional coverage and achieving coverage goals.
  • Working closely with design engineers, micro-architects, and other team members to ensure high quality of test plans, functional coverage, and tests.
  • Deliver high-quality output against deadlines and working effectively in a cross-site team environment.
The Ideal Candidate Should Show The Following Behavioral Traits
  • Excellent problem-solving, initiative and interpersonal skills.
  • Advanced communications skills.
Qualifications
Minimum qualifications are required to be initially considered for this position.
  • Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 3+ years of relevant work experience.
OR
  • Master's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field with 2+ years of relevant work experience listed below:
  • Hardware description languages (such as VHDL, Verilog or System Verilog).
  • Test bench development with System Verilog UVM/OVM.
  • At least one programming/scripting languages such as C/C++, Perl, Ruby, Python, and Unix (Linux).
  • Test writing/generation, checker development, coverage analysis, failure debug, root cause analysis.
  • Advanced English level.
Must have unrestricted - permanent right to work in Mexico. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.
  • Experience with Intel Architecture ISA and system architecture, x86 assembly language.
  • Industry standard formal verification tools such as JasperGold, IFV, Questa Formal, VC Formal.
  • In-depth computer architecture knowledge.
Job Type
Experienced Hire
Shift
Shift 1 (Mexico) Primary Location:Mexico, Guadalajara Additional Locations:
Posting Statement
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation or any other characteristic protected by local law, regulation, or ordinance. Position of Trust N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change. ADDITIONAL INFORMATION: Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.
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