Senior HF Analog Design Lead for Broadband Optical ICs

A; Corbetta; In loco; EUR 140.000 - 210.000; Tempo pieno

Descrizione del lavoro

ams Italy S.r.l. is seeking a senior leader in HF analog layout and circuit design to define methodologies and drive critical analog developments for broadband optical ICs.

The role requires 15+ years of experience, a strong background in HF amplifiers, TIAs, and high-speed front-end designs, plus advanced CMOS node expertise. You will lead layout strategy and architectural development, mentor engineers, and oversee complex validation of RF/analog blocks to ensure silicon success.

Competenze

• MSc or PhD in Electrical Engineering is required.
• 15+ years analog IC design experience is required.
• Broadband optical communication IC design knowledge, including HF amplifiers, TIAs, drivers and RF front-end requirements.
• HF layout knowledge is an advantage.
• PM/PML: PLLs, CDRs, ADCs and DACs knowledge is needed.
• Signal integrity, noise, jitter and parasitic-aware design analysis are essential.
• Advanced CMOS node experience, including FinFET and/or FD-SOI, is required.

Mansioni

• Lead company-wide HF analog circuit design and define methodologies.
• Lead design of high-performance analog and mixed-signal circuits.
• Drive innovation in transmitter and receiver architectures.
• Establish analog design methodologies and best practices.
• Lead technical reviews and sign-off decisions.
• Mentor senior engineers and technical leaders.

Conoscenze

Analog IC design

Broadband optical ICs

HF layout

PLLs/CDRs/ADCs/DACs

Signal integrity/Jitter

CMOS FinFET/FD-SOI

Mentor/leadership

Formazione

MSc in Electrical Engineering

PhD in Electrical Engineering

Descrizione del lavoro

ams Italy S.r.l. is seeking a senior leader in HF analog layout and circuit design to define methodologies and drive critical analog developments for broadband optical ICs.

The role requires 15+ years of experience, a strong background in HF amplifiers, TIAs, and high-speed front-end designs, plus advanced CMOS node expertise. You will lead layout strategy and architectural development, mentor engineers, and oversee complex validation of RF/analog blocks to ensure silicon success.