Senior Digital IC Designer – SoC & Edge AI

NXP Semiconductors NV; Sicilia; On-site; EUR 51,000 - 70,000; Full time

Job summary

NXP in Italy (Catania) is building new teams to create high‑impact MCU/SOC products for AI at the Edge. You will lead the full digital IC design flow for complex SOCs, from specification and RTL coding to synthesis, STA, formal verification and power analysis.

Collaborating with analog, mixed‑signal and software teams, you will optimize interfaces, mentor junior engineers and generate design documentation. The role includes a competitive salary and a broad benefits package.

Qualifications

• Master’s degree in Electrical or Electronics Engineering.
• 5+ years of digital IC design experience.
• Proficient in Verilog/SystemVerilog for RTL design and verification.
• Experience with major EDA tools (Design Compiler, Genus, Primetime, Formality, VCS/QuestaSim).
• Strong understanding of CDC, power integrity and low-power design.
• Proficient in Python/Perl/Tcl scripting.
• Familiar with mixed-signal integration and verification.
• Excellent problem-solving and communication skills.
• Able to lead technical discussions and work independently.

Responsibilities

• Lead and execute the full digital IC design flow for complex System-on-Chip (SOC).
• Collaborate with analog, mixed-signal, and software teams to define interfaces and optimize performance.
• Develop and implement digital architectures and design methodologies to meet perf, power and area targets.
• Perform comprehensive design verification using simulation, formal verification, and hardware emulation.
• Participate in post-silicon validation and debug activities, resolving issues for quality.
• Mentor junior engineers and contribute to continuous improvement of design processes.
• Generate detailed design documentation, including specifications, test plans, and design reviews.
• Stay abreast of industry trends and best practices in digital IC design.

Skills

Verilog/SystemVerilog

Digital IC design

CDC issues

Power integrity

Low-power design

Scripting (Python, Perl, Tcl)

Mixed-signal verification

Debugging

Communication skills

Leadership/initiative

Education

Master’s degree in Electrical/Electronics Eng

Tools

Design Compiler

Genus

Primetime

Formality

VCS

QuestaSim

Job description

NXP in Italy (Catania) is building new teams to create high‑impact MCU/SOC products for AI at the Edge. You will lead the full digital IC design flow for complex SOCs, from specification and RTL coding to synthesis, STA, formal verification and power analysis.

Collaborating with analog, mixed‑signal and software teams, you will optimize interfaces, mentor junior engineers and generate design documentation. The role includes a competitive salary and a broad benefits package.