Senior Digital Design Lead, Power Management ICs

Renesas Electronics Corp.; Catania; On-site; EUR 61,000 - 82,000; Full time

Job summary

Renesas Electronics Corp. in Sicily seeks a Snr Staff Digital Design Engineer with a strong background in EE/ECE and 8–12 years of industry experience. You will report to the Snr Manager of Design Engineering and work on cutting‑edge digital power management ICs.

You will develop, verify, and debug digital designs in pre/post silicon, write tests, and automate design flows while mentoring junior engineers and leading design blocks across projects.

Qualifications

• BSc/MSc in EE/ECE with 8–12 years of industry experience.
• CDC/RDC/LINT clean designs in Verilog.
• SystemVerilog test benches debugging.
• Gate level simulation and mixed‑signal debugging.

Responsibilities

• Develop, debug, and verify digital designs in pre and post Silicon.
• Write tests to verify bulk design intent per specification.
• Develop scripts to automate design flows.
• Manage design blocks in requirements, architecture and implementation.
• Present new tools to aid the design development process.
• Mentor junior engineers.
• Lead as functional digital design lead on projects.

Skills

Verilog

SystemVerilog

Cadence

Synopsys

Python

Perl

I2C

I3C

SPI

I2S

ARM Cortex‑M

Digital design

Education

BSc/MSc in Electrical Engineering/Computer Engineering

Job description

Renesas Electronics Corp. in Sicily seeks a Snr Staff Digital Design Engineer with a strong background in EE/ECE and 8–12 years of industry experience. You will report to the Snr Manager of Design Engineering and work on cutting‑edge digital power management ICs.

You will develop, verify, and debug digital designs in pre/post silicon, write tests, and automate design flows while mentoring junior engineers and leading design blocks across projects.