Junior FPGA Site Engineer — Rome (On-Site)

RINA Piraeus Team; Roma; On-site; EUR 31,000 - 40,000; Full time

Job summary

RINA in Rome is seeking a Junior FPGA Site Engineer to join the Electronics and System Engineering Division and support FPGA-based systems development, integration, and testing in a highly technical environment.

The role requires a Master’s in Electronics, knowledge of VHDL/Verilog, and familiarity with Libero SoC and FPGA tools. The position offers a competitive gross salary range and a welfare package.

Qualifications

• Master’s degree in Electronics or related field.
• Knowledge of VHDL and/or Verilog.
• Familiarity with FPGA development, simulation and verification activities.
• Familiarity with Libero SoC.

Responsibilities

• Support the design and development of FPGA-based solutions.
• Development and implementation of digital logic for FPGA devices.
• Support to FPGA integration, verification and validation activities.
• Execution of functional tests, debugging and troubleshooting on hardware and FPGA-based systems.
• Collaboration with hardware, software, firmware and system engineering teams.

Skills

Hardware basics

VHDL/Verilog

FPGA development

Libero SoC

Education

Master’s Degree in Electronics

Job description

RINA in Rome is seeking a Junior FPGA Site Engineer to join the Electronics and System Engineering Division and support FPGA-based systems development, integration, and testing in a highly technical environment.

The role requires a Master’s in Electronics, knowledge of VHDL/Verilog, and familiarity with Libero SoC and FPGA tools. The position offers a competitive gross salary range and a welfare package.