Field Applications Engineer, Verification

Synopsys Inc; Agrate Brianza; On-site; EUR 85,000 - 110,000; Full time

Benefits offered by this job

Health benefits

Job summary

Synopsys Inc is seeking an experienced Verification Engineer to support pre-sales demos, deploy verification tools post-sale, and drive solutions across Italy and Europe. You will apply expertise in static, formal, and dynamic verification, collaborating with R&D to map customer needs to tool features and methodologies, while building strong customer relationships.

The role requires hands-on RTL verification, Verilog/SystemVerilog proficiency, and scripting skills.

Qualifications

• Bachelor's degree required in a relevant engineering field.
• Hands-on RTL verification experience and verification methodology familiarity.
• Strong knowledge of static/tested verification tools (SpyGlass) and formal verification (VC Formal).
• Proficiency with Verilog/SystemVerilog and scripting languages (Tcl, Python, Perl, shell).
• Fluent English; Italian language skills are a strong advantage.

Responsibilities

• Support pre-sales demos, benchmarks, and proof-of-concept work with customers.
• Deploy and troubleshoot verification tools post-sale with customer teams.
• Apply expertise in static verification, formal verification, or dynamic simulation.
• Collaborate with R&D to communicate customer needs and reproduce issues.
• Deliver technical workshops and training on verification technologies.
• Build trusted relationships with semiconductor companies across Italy and Europe.

Skills

Fluent English

Italian language skills (advantage)

Education

Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field

Tools

Verilog

SystemVerilog

SpyGlass

VC Formal

VCS

UVM

Linux

Tcl

Python

Perl

Shell

Job description

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

We Are

Synopsys is the leader in engineering solutions from silicon to systems, enabling customers to rapidly innovate AI-powered products. We deliver industry-leading silicon design, IP, simulation and analysis solutions, and design services. We partner closely with our customers across a wide range of industries to maximize their R&D capability and productivity, powering innovation today that ignites the ingenuity of tomorrow.

You Are

You have spent years in verification, close enough to the tools to know what breaks and close enough to customers to know the right answer depends on what they are actually trying to verify. You have debugged enough RTL and traced enough CDC violations to understand verification is about building confidence the design will work when it ships.

You walk into customer meetings, listen to what they are stuck on, and map problems to solutions they can use. When something does not work, you reproduce it and show up with enough context that R&D can fix it. You like bridging product and customer reality. At Synopsys, you will work with semiconductor teams across Europe who depend on verification tools to catch issues that would otherwise cost months in silicon.

What You'll Be Doing

• Support pre-sales demos, benchmarks, and proof-of-concept work that helps customers evaluate verification solutions
• Deploy and troubleshoot verification tools post-sale, resolving issues with customer engineering teams
• Apply expertise in static verification using SpyGlass, formal verification with VC Formal, or dynamic simulation using VCS and UVM
• Work with R&D to communicate customer needs and reproduce issues
• Deliver technical workshops and training on verification technologies
• Build trusted relationships with engineering and management at semiconductor companies across Italy and Europe

The Impact You Will Have

• Enable customers to catch critical design issues earlier, reducing respins and schedule risk
• Accelerate tool deployment by resolving blockers and providing methodology guidance
• Influence product roadmaps by surfacing customer requirements
• Help close deals by running evaluations that demonstrate value on customer designs
• Reduce support escalations by diagnosing issues and providing R&D with context

What You'll Need

• Bachelor's degree in Electrical Engineering, Computer Engineering, Computer Science, or related field
• 5+ years in the semiconductor industry at an EDA company or semiconductor design company
• Hands‑on experience in RTL verification or verification methodology
• Strong knowledge in static verification (SpyGlass), formal verification (VC Formal), or dynamic simulation (VCS, UVM)
• Proficiency in Verilog and SystemVerilog
• Comfort with Linux and scripting in Tcl, Python, Perl, or shell
• Fluent English; Italian language skills are a strong advantage

Who You Are

• You listen to a verification problem and walk out with a plan that maps to tool features and methodology changes
• You reproduce issues and show up with enough detail that problems can be solved
• You present comfortably to engineers who want depth and managers who want to know if this will work
• You manage multiple customer engagements without losing track of commitments

Rewards And Benefits

We offer a comprehensive range of health, wellness, and financial benefits to cater to your needs. Our total rewards include both monetary and non‑monetary offerings.