Embedded AI Architect

microTECH Global Limited; Pisa; Presencial; EUR 100.000 - 200.000; Jornada completa

Descripción de la vacante

microTECH Global Limited in Pisa, Italy seeks an Embedded AI OS Architect to design OS and middleware that merges deterministic execution with agentic AI. You will optimize performance of embedded hardware and shape resource scheduling for AI model inference.

The role requires a MSc/PhD in CS/CE/EE, deep Linux kernel or RTOS knowledge, ARM/RISC-V expertise, strong C/C++ and driver experience, and edge AI tooling such as TensorFlow Lite.

Formación

• MSc. or Ph.D. in Computer Science, Computer Engineering, or Electronic Engineering.
• Deep knowledge of Linux kernel internals and/or RTOS (e.g., Zephyr, FreeRTOS, ERIKA).
• Strong understanding of ARM or RISC-V ISA, SoCs, MMUs, cache/memory hierarchies.
• Excellent C/C++ programming skills, with experience in Assembly and device driver implementation.
• Experience with machine learning (CNN, DNN, SVM) and edge AI tooling.

Responsabilidades

• Architecture & AI Integration: Design OS and middleware architectures that integrate deterministic execution with novel agentic AI technologies.
• Performance Optimization: Analyze and reduce end-to-end latencies across embedded hardware (CPUs, GPUs, NPUs, memory, network).
• Resource Scheduling: Develop core OS tech to support efficient AI model inference and heterogeneous resource scheduling.

Conocimientos

C/C++ programming

Assembly

Linux kernel internals

RTOS (Zephyr/FreeRTOS/ERIKA)

Arm or RISC-V

Edge AI/ML

Device driver implementation

Educación

MSc or PhD in Computer Science/Engineering

Herramientas

TensorFlow Lite

Descripción del empleo

Job Title: Embedded AI OS Architect

Location: Pisa, Italy

Salary: 100,000EUR + Bonuses + Tax Exemption

Total Package up to 200,000EUR

This client requires candidates to relocate to Italy and work on-site in Pisa.

Main Responsibilities:

Architecture & AI Integration: Design OS and middleware architectures that integrate deterministic execution with novel agentic AI technologies.

Performance Optimization: Perform low-level performance analysis to reduce end-to-end latencies across embedded hardware components (CPUs, GPUs, NPUs, memory, network).

Resource Scheduling: Develop core OS technologies to support efficient AI model inference and heterogeneous resource scheduling.

Requirements:

M.Sc. or Ph.D. in Computer Science, Computer Engineering, or Electronic Engineering.

OS & Kernel Expertise: Deep knowledge of Linux kernel internals and/or RTOS (e.g., Zephyr, FreeRTOS, ERIKA), including subsystems, POSIX standards, and deterministic service-oriented architectures.

Hardware Architecture: Strong understanding of ARM or RISC-V ISA, SoCs, MMUs, cache/memory hierarchies, and reducing shared resource contention.

Software Engineering: Excellent C/C++ programming skills, with past experience in Assembly and device driver implementation.

Edge AI & ML: Experience with machine learning (CNN, DNN, SVM), edge AI programming (LiteRT, TensorFlow Lite), and deterministic AI inference mechanisms.

Desirables:

Knowledge of automotive standards (OSEK/VDX, AUTOSAR Classic).

Familiarity with functional safety standards (ISO 26262, IEC61508).