Technical Architect - Memory layout Design

HCL Technologies Limited; India; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

HCL Technologies Limited is seeking a Technical Architect specializing in memory layout design in India. You will drive advanced memory characterization initiatives, act as a technical authority, and guide project teams to deliver high-quality semiconductor solutions.

The role demands deep proficiency in memory architectures, SPICE simulations, and automation with Python or Perl, ensuring rigorous data integrity and scalable workflows across programs.

Qualifications

• Advanced proficiency in memory characterization methodologies and tools (Cadence, Synopsys, Mentor Graphics).
• Experience with SPICE simulations and testbench setup for memory validation.
• Strong data analysis and automation using Python or Perl.
• Knowledge of silicon measurement platforms and characterization equipment.

Responsibilities

• Define, implement, and optimize memory characterization methodologies for timing, power, and reliability.
• Guide team in SPICE setups, validation, and interpretation of results.
• Automate workflows with Python or Perl; enforce coding standards.
• Ensure data integrity using silicon measurement equipment and QA processes.
• Provide estimations for project components and participate in feasibility studies.
• Collaborate with stakeholders to define scope and deliverables.

Skills

Memory characterization

Team guidance

SPICE simulations

Python/Perl automation

Data analysis

Tools

Cadence

Synopsys

Mentor Graphics

Advantest

Teradyne

Job description

Technical Architect - Memory layout Design India Job Description Technical Architect - Memory layout Design

Job Summary

This role is accountable for driving complex memory characterization initiatives, serving as a technical authority and guiding project teams in delivering high-quality solutions. The individual leverages advanced proficiency in memory characterization methodologies to optimize performance, ensure compliance with industry standards, and facilitate successful project execution. They act as a key resource in technical consultations, process improvements, and stakeholder communication to advance organizational objectives.

Key Responsibilities

1. Provide advanced proficiency in memory characterization using tools such as Cadence, Synopsys, and Mentor Graphics to define, implement, and optimize methodologies for timing, power, and reliability analysis in semiconductor projects.
2. Guide team members in applying best practices for memory characterization, including setup, validation, and interpretation of SPICE simulations and testbench environments to ensure accuracy and consistency of results.
3. Conduct comprehensive reviews of characterization data and scripts, utilizing Python or Perl for automation and quality assurance, and enforcing coding standards to maintain robust workflows.
4. Establish and oversee quality assurance processes through the deployment of advanced characterization techniques using silicon measurement equipment (e.g., Advantest, Teradyne), ensuring data integrity and performance optimization.
5. Participate in technical discussions and feasibility studies, evaluating memory architectures and characterization approaches, identifying technical risks, and providing detailed estimations for project components.
6. Collaborate with project stakeholders to define scope and deliverables, prepare technical status reports, and address escalations through effective communication and issue resolution.

Skill Requirements

1. Advanced proficiency in memory characterization methodologies and tools (Cadence, Synopsys, Mentor Graphics)
2. Solid understanding of semiconductor device physics and memory architectures (SRAM, DRAM, Flash)
3. In-depth experience with SPICE simulations and testbench setup for memory validation
4. Strong skills in data analysis and automation using Python or Perl for characterization workflows
5. Advanced knowledge of silicon measurement platforms and characterization equipment
6. Proven ability to oversee quality assurance and enforce coding standards in complex projects

Other Requirements

1. Optional but valuable: Cadence Certified Memory Designer, Synopsys Certified Verification Engineer, Mentor Graphics Certification in Memory Characterization

Why HCLTech?

At HCLTech, you'll supercharge your potential. You'll find your career. And you'll find your spark. All at a place that knows that helping its customers stay on top starts by putting its people first.

HCLTech is a global technology company, home to more than 223,000 people across 60 countries, delivering industry-leading capabilities centered around digital, engineering, cloud and AI, powered by a broad portfolio of technology services and products. We work with clients across all major verticals, providing industry solutions for Financial Services, Manufacturing, Life Sciences and Healthcare, Technology and Services, Telecom and Media, Retail and CPG, and Public Services. Consolidated revenues as of 12 months ending June 2026totaled $14.8billion.