Senior Technical Architect - Memory characterization

HCL Technologies Limited; Bengaluru; On-site; INR 4,000,000 - 7,000,000; Full time

Job summary

HCL Technologies Limited in Bengaluru seeks a Senior Technical Architect for Memory characterization to drive design and characterization of memory IPs (SRAM, ROM, register files) across SoC teams.

The role requires 12+ years of experience in memory IP design, transistor-level analysis, and collaboration with RTL, layout, and verification to deliver PPA-optimized solutions for advanced nodes.

Qualifications

• 12+ years of experience in memory IP design cycles from spec to silicon.
• Experience in leading modules/teams is a plus.
• Exposure to advanced nodes (≤16nm preferred).

Responsibilities

• Design & Development of high-performance, low-power memory circuits (SRAM/ROM/Register Files).
• Work on bitcell design, peripheral circuits, sense amplifiers, decoders, and control logic.
• Drive memory architecture definition based on SoC requirements.
• Optimize designs for power, performance, and area (PPA).
• Interface with RTL, Physical Design, DFT, and Product teams for integration.
• Support layout teams for custom layout guidance and ensure DRC/LVS compliance.
• Participate in design reviews, tapeouts, and silicon validation.
• Analyze post-silicon results and debug failures.
• Work on yield improvement and reliability issues.

Skills

Memory IP design

Low-power design

Circuit design

Transistor-level design

Layout and verification

Education

Bachelor’s/Master’s/Ph.D. in Electronics / Electrical / VLSI / Microelectronics

Tools

Cadence Virtuoso

Spectre/HSPICE

DRC/LVS

Job description

Senior Technical Architect - Memory characterization Senior Technical Architect - Memory characterization India Job Description Senior Technical Architect - Memory characterization Bangalore, Karnataka

Job Summary

Role Overview

We are seeking highly motivated Memory Design Engineers with12+ years of experience to design, develop, and optimize memory IPs (SRAM, ROM, Register files, etc.) for advanced semiconductor nodes. The role involves circuit design, characterization, and collaboration across RTL, layout, and verification teams.

Key Responsibilities

Design & Development

• Design and develop high-performance, low-power memory circuits (SRAM/ROM/Register Files).
• Work on bitcell design, peripheral circuits, sense amplifiers, decoders, and control logic.
• Drive memory architecture definition based on SoC requirements.
• Optimize designs for power, performance, and area (PPA).

Circuit Design & Analysis

• Perform transistor-level design and simulations (SPICE, Spectre, HSPICE).
• Conduct corner analysis, Monte Carlo simulations, and variation-aware design.
• Debug design issues across PVT conditions.

Integration & Collaboration

• Interface with RTL, Physical Design, DFT, and Product teams for seamless integration.
• Support layout teams for custom layout guidance and ensure DRC/LVS compliance.
• Participate in design reviews, tapeouts, and silicon validation.

Silicon Bring-up & Debug

• Analyze post-silicon results and debug failures.
• Work on yield improvement and reliability issues (aging, EM, IR drop).

Automation & Tools

• Develop scripts (Python, Perl, Shell) to automate design and verification tasks.

Skill Requirements

Technical Skills

• Strong understanding of:
  • CMOS fundamentals
  • Memory architectures (SRAM, ROM, emerging memory is a plus)
  • Low-power design techniques
• Expertise in tools:
  • Cadence Virtuoso, Spectre/HSPICE
  • Layout tools & verification flows (DRC/LVS)
• Knowledge of:
  • STA basics, timing closure for memory interfaces
    Yield, variability, and reliability analysis

Other Requirements

Preferred Qualifications

• Experience with memory compilers or embedded memory IP development
• Knowledge of FinFET technologies
• Experience in high-speed interfaces or cache design

Soft Skills

• Strong problem-solving and debugging skills
• Ability to work across cross-functional teams
• Good communication and documentation skills

Education

Bachelor’s/Master’s/Ph.D. in Electronics / Electrical / VLSI / Microelectronics

• 12+ Years (Senior Level):
  • Strong experience in complete memory IP design cycles from spec to silicon.
  • Experience in leading modules/teams is a plus.
  • Exposure to advanced nodes (≤16nm preferred).

Why HCLTech?

At HCLTech, you'll supercharge your potential. You'll find your career. And you'll find your spark. All at a place that knows that helping its customers stay on top starts by putting its people first.

HCLTech is a global technology company, home to more than 223,000 people across 60 countries, delivering industry-leading capabilities centered around digital, engineering, cloud and AI, powered by a broad portfolio of technology services and products. We work with clients across all major verticals, providing industry solutions for Financial Services, Manufacturing, Life Sciences and Healthcare, Technology and Services, Telecom and Media, Retail and CPG, and Public Services. Consolidated revenues as of 12 months ending June 2026totaled $14.8billion.