Static Timing Analysis (STA) Engineer

Spiderchip Telangana

Hyderabad

On-site

INR 1,200,000 - 2,400,000

Full time

10 days ago

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Job summary

Spiderchip Telangana in India is seeking an experienced Static Timing Analysis (STA) engineer to analyze and validate complex VLSI designs for integrity and functionality.

You will work with cross-functional teams, use industry-leading tools to optimize performance, document findings, and contribute to process improvements while mentoring junior engineers.

Qualifications

  • Perform static timing analysis on complex VLSI designs to ensure design integrity and functionality.
  • Utilize industry-leading tools and methodologies to analyze and optimize design performance.
  • Collaborate with cross-functional teams to identify and resolve design issues.
  • Develop and maintain detailed documentation of analysis results and recommendations.
  • Continuously improve the efficiency and effectiveness of static timing analysis processes.
  • Provide technical guidance and support to junior engineers and designers.

Responsibilities

  • Perform static timing analysis on complex VLSI designs to ensure design integrity and functionality.
  • Utilize industry-leading tools and methodologies to analyze and optimize design performance.
  • Collaborate with cross-functional teams to identify and resolve design issues.
  • Develop and maintain detailed documentation of analysis results and recommendations.
  • Continuously improve the efficiency and effectiveness of static timing analysis processes.
  • Provide technical guidance and support to junior engineers and designers.

Job description

  • Perform static timing analysis on complex VLSI designs to ensure design integrity and functionality.
  • Utilize industry-leading tools and methodologies to analyze and optimize design performance.
  • Collaborate with cross-functional teams to identify and resolve design issues.
  • Develop and maintain detailed documentation of analysis results and recommendations.
  • Continuously improve the efficiency and effectiveness of static timing analysis processes.
  • Provide technical guidance and support to junior engineers and designers.
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