Staff Engineer

Broadcom Inc.; Bengaluru; On-site; INR 1,800,000 - 2,800,000; Full time

Job summary

Broadcom Inc. in Bengaluru is seeking a Staff Engineer to drive RTL design and verification across digital and memory subsystems, including BIST. The role demands hands-on expertise in RTL, synthesis, and DFT.)

You will apply MBIST/ATPG/RSQ methodologies within a cross-functional team to ensure robust sign-off and timing closure, with a strong emphasis on formal verification and UVM-based test benches.

Qualifications

• Hands-on RTL and synthesis experience.
• Experience defining ICC/Synthesis constraints for timing closure.
• Familiarity with DFT flows (MBIST, ATPG, RSQ) and verification methods.
• Familiarity with Spyglass, LEC, CDC, and synthesis tools.
• Knowledge of GLS, simulation, UVM/OVM is a plus.

Responsibilities

• RTL development and verification for digital subsystems and memory subsystems including BIST.
• Memory subsystems with Tessent/Embedded MBIST.
• MBIST, ATPG, RSQ verification and sign-off.
• Formal verification, Cross Clock Domain checks, Power/Timing sign-off.
• Verify complex digital subsystems through OVM, UVM methodologies and build verification suites.

Skills

RTL design

Verification

DFT

ATPG

RSQ

UVM

Verilog

SystemVerilog

Education

Bachelor's degree in Electrical Engineering or Computer Science

Tools

Spyglass

LEC

DC Ultra

Fusion Compiler

Verilog-XL

Job description

## Staff EngineerApply: IND-Bangalore Electronic City - S1: Full time: Posted Yesterday: R027147**Please Note:****1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)****2. If you already have a Candidate Account, please Sign-In before you apply.**## **Job Description:****Broadcom Central Engineering team is looking for a Multi Skilled RTL, Verification engineer with DFT expertise. The Successful candidate will work in one or more domains of RTL, Verification, DFT for Complex Memory, IO subsystems, Hierarchical Blocks including BIST. It is a great opportunity and challenging role for the people who want to gain in-depth knowledge on end to end chip development flow with deeper expertise on RTL, Synth and Memory BIST******Responsibilities***** **RTL development and Verification for Digital subsystems, Memory Subsystems including BIST.*** **Memory Digital Subsystems with Tessent/Embedded MBIST*** **MBIST, ATPG, RSQ Verification and sign-off.*** **Formal verification, Cross Clock Domain checks, Power/Timing sign off*** **Verify complex Digital subsystems through OVM, UVM methodology, creating the Verification Suit Independently.******Requirements***** **Hands on Experience with RTL, Synthesis,*** **Hands on experience in defining ICC/Synthesis constraints that meets timing closure needs*** **Familiarity with DFT flows includes MBIST, ATPG, RSQ and Verification methodologies and best practices for the DFT signoff.*** **Familiarity with Spyglass, LEC, CDC, and Synthesis tools DC Ultra, Fusion Compiler.*** **Familiarity with GLS, simulation, UVM, OVM methodologies is a big plus*** **Proficiency with Verilog NC, Verilog XL tools*** **Strong fundamentals in digital design and Coding/Verifying complex RTL subsystems****Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**