Staff DFT Engineer

Mulya Technologies

Bengaluru

Presencial

INR 3 000 000 - 5 400 000

Tempo integral

Há 9 dias

Uma candidatura completa num minuto

Currículo e carta de apresentação personalizados, prontos a enviar.

Ultrapassa os filtros ATS

Resumo da oferta

Mulya Technologies in Bengaluru invites an experienced Staff DFT Engineer to lead Siemens Tessent-based DFT implementations and verification across RTL and netlist levels. You will collaborate with Design, Verification and Physical Design teams to optimize MBIST, Boundary Scan, ATPG patterns, and DFT constraints, ensuring timing and synthesis alignment while maintaining high-quality manufacturing test.

The role offers exposure to cutting-edge hardware testing, mentorship, and a path to technical

Qualificações

  • 7–12 years of hands-on DFT experience in ASIC/SoC designs.

Responsabilidades

  • Hands-on experience in DFT RTL generation and integration using Siemens Tessent.

Conhecimentos

DFT experience
Siemens Tessent
MBIST
Boundary Scan
ATPG pattern generation
RTL timing
Scripting (Tcl/Perl/Python)
Debugging

Formação académica

Bachelor’s/Master’s in Electrical/Electronic Engineering

Ferramentas

Siemens Tessent

Descrição da oferta de emprego

Top20 Semiconductor Organization in the world

We are a global semiconductor leader that bridges the physical and digital worlds to enable breakthroughs at the Intelligent Edge. combine analog, digital, AI, and software technologies into solutions that combat climate change, reliably connect humans and the world, and help drive advancements in automation and robotics, mobility, healthcare, energy and data centers. With revenue of more than $10 billion in FY25, we ensure today's innovators stay Ahead of What's Possible.

We are looking for an experienced and hands-on Staff DFT Engineer with strong expertise in Siemens Tessent-based DFT implementation and verification. The role requires solid experience across DFT RTL generation, MBIST, Scan/ATPG, Boundary Scan, timing simulations, and DFT constraints.

Key Responsibilities / Experience
  • Hands-on experience in DFT RTL generation and integration using Siemens Tessent.
  • Strong working experience with SSN, SIB, TAP/JTAG, MBIST, and Boundary Scan, including DFT RTL generation and verification.
  • Hands-on expertise in MBIST RTL simulation and timing simulation, including debugging and validation.
  • Experience in Scan Stitching, Scan Compression, DFT DRC, and ATPG pattern generation using Tessent.
  • Generate and validate high-quality manufacturing ATPG patterns for Stuck-at (SAF) and Transition Fault (TDF) models.
  • Perform validation of DFT structures and patterns at RTL and gate-level/netlist, including simulations with and without SDF.
  • Develop and validate DFT constraints and work closely with the Physical Design team for synthesis, STA, timing closure, and DFT implementation support.
  • Hands-on experience with timing simulations and debugging DFT-related timing or pattern failures.
  • Collaborate with Design, Architecture, Verification, Physical Design, and Product/Test Engineering teams throughout the DFT implementation cycle.
  • Support debug and resolution of DFT implementation, simulation, coverage, and test-related issues.
Required Skills
  • Bachelor’s/master’s degree in electrical/Electronic Engineering or a related field.
  • 7–12 years of hands-on DFT experience in ASIC/SoC designs.
  • Strong hands-on expertise with Siemens Tessent.
  • Experience with DFT RTL Generation, SSN/SIB/TAP, JTAG, MBIST, Boundary Scan, Scan Stitching, ATPG, DFT DRC, and DFT STA constraints.
  • Strong experience in MBIST RTL/Timing Simulation and DFT timing simulation.
  • Good understanding of RTL, netlist, SDF, synthesis, STA, and Physical Design flows.
  • Scripting experience in Tcl, Perl, and/or Python.
  • Strong debugging, problem-solving, and communication skills.
Why You'll Love Working Here

At you'll be part of a collaborative and innovative team that's shaping the future of technology. We offer a supportive environment focused on professional growth, competitive compensation and benefits, work-life balance, and the opportunity to work on cutting-edge projects that make a real impact on the world.

Your expertise will shape the future of technology, and you’ll be supported by a culture that values continuous advancement and professional growth. Join us and help create the technologies that bridge the physical and digital worlds, making a tangible difference in how people live, work, and connect.

Obtém a tua avaliação gratuita e confidencial do currículo.

ou arrasta e larga o ficheiro aqui.

Similar jobs

Ofertas semelhantes que vale a pena comparar

Senior Staff SOC Design
Senior Staff SOC Design

Mulya Technologies • Hyderabad

Presencial
INR 2 800 000 - 4 200 000
Staff DFT Engineer
Staff DFT Engineer

Mulya Technologies • Hyderabad

Presencial
INR 4 000 000 - 7 000 000
Design for Test Engineers
Design for Test Engineers

Bibha AI Inc. • Índia

Presencial
INR 1 200 000 - 3 000 000
Health insurance
Retirement plan
Paid time off
+1
Senior Staff Engineer – DFT
Senior Staff Engineer – DFT

LeadSOC Technologies Pvt Ltd • Bengaluru

Presencial
INR 4 500 000 - 7 000 000
Senior Staff DFT Engineer
Senior Staff DFT Engineer

Mulya Technologies • Bengaluru

Presencial
INR 4 500 000 - 7 000 000
Dft Design Engineer
Dft Design Engineer

7rays Semiconductors • Hyderabad, Bengaluru, Greater Noida

Presencial
INR 400 000 - 800 000
Staff DFT Engineer
Staff DFT Engineer

TylSemi, Inc. • Bengaluru

Presencial
INR 4 000 000 - 7 500 000
Senior DFT Engineer
Senior DFT Engineer

Veedee Solutions LLP • Kurnool

Presencial
INR 2 500 000 - 4 500 000
Senior DFT Engineer
Senior DFT Engineer

TylSemi, Inc. • Bengaluru

Presencial
INR 1 500 000 - 3 200 000
Senior DFT Engineer
Senior DFT Engineer

Veedee Solutions LLP • Chennai

Presencial
INR 2 500 000 - 4 500 000