Sr. Staff Verification Engineer- LoRa

Sierra Wireless; Hyderabad; On-site; INR 4,000,000 - 6,000,000; Full time

Job summary

Sierra Wireless in Hyderabad seeks a senior SoC verification engineer to define test plans, verify RTL with UVM, and drive coverage-driven verification. You will collaborate with design and architecture teams to ensure system requirements are met and to debug complex verification issues.

The role requires 8+ years of hands-on experience, SystemVerilog, and familiarity with VCS/QuestaSim. Strong communication and teamwork skills are essential in a fast-paced hardware environment.

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.

Responsibilities

• Define and implement test plans and verification strategies based on design specifications and requirements.
• Develop assertion-based checkers and functional coverage models aligned to verification plans.
• Perform functional verification of RTL designs using industry-standard methodologies (e.g. UVM).
• Generate and analyse coverage reports to ensure verification of completeness and quality.
• Collaborate with design and architecture teams to understand system requirements and ensure alignment.
• Identify, debug, and resolve verification issues and design bugs.

Skills

UVM

SystemVerilog

Assertion-based verification

Coverage analysis

IC/SoC verification

Formal verification

Bus architectures

Low-power verification

Debugging

Teamwork

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

VCS

QuestaSim

Job description

Responsibilities:

• Define and implement test plans and verification strategies based on design specifications and requirements (20%).


• Develop assertion-based checkers and functional coverage models aligned to verification plans (20%).


• Perform functional verification of RTL designs using industry-standard methodologies (e.g. UVM) (20%).


• Generate and analyse coverage reports to ensure verification of completeness and quality (20%).


• Collaborate with design and architecture teams to understand system requirements and ensure alignment (10%).


• Identify, debug, and resolve verification issues and design bugs (10%).

Minimum Qualifications:

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.


• 8+ years of experience in SoC verification.


• Strong hands‑on experience with UVM‑based verification methodologies.


• Proven experience in defining and executing test and verification plans.


• Experience with coverage‑driven verification and coverage analysis.


• Proficiency in SystemVerilog and assertion‑based verification.


• Familiarity with industry‑standard verification tools (e.g. VCS, QuestaSim).


• Experience with IC design verification at block and SoC level.


• Knowledge of formal verification techniques.


• Experience verifying bus architectures (e.g. AMBA AHB/AXI, NoC, Bus Fabric) in UVM environments.


• Understanding of low‑power verification methodologies.


• Strong analytical, debugging, and problem‑solving skills.


• Excellent communication and teamwork abilities.

Desired Qualifications

• Strong programming skills in Python.


• Experience in wireless SoC design and verification.


• Knowledge of scripting languages (e.g. Tcl, Python, Perl) for automation.


• Familiarity with version control systems (e.g. Git).