Sr. Manager - DFT

Tessolve; Bengaluru; On-site; INR 3,500,000 - 6,000,000; Full time

Job summary

Tessolve is seeking a Design-for-Test (DFT) Manager in Bangalore to lead DFT efforts across multiple ASIC projects. You will drive architecture, planning and verification, and mentor a skilled team in a dynamic global setting.

With 10+ years in RTL/DFT, you will collaborate with cross-functional groups, optimize ATPG/MBIST/LBIST strategies, and engage clients on technical updates while supporting post-silicon bring-up.

Qualifications

• Expert in scan insertion, ATPG, MBIST and test-mode integration.
• Proficient in RTL design, CDC, synthesis and physical design flows.
• Experience leading complex DFT programs and collaborating with cross-functional teams.

Responsibilities

• Lead the DFT team to deliver solutions across multiple ASIC projects.
• Oversee DFT architecture, planning and verification processes.
• Collaborate with cross-functional teams to ensure smooth DFT integration.
• Review and optimize ATPG/MBIST/LBIST strategies.
• Drive methodology enhancements and automation initiatives.
• Manage project schedules, deliverables and resources.
• Provide mentorship and client engagement on technical updates.
• Support post-silicon bring-up and pattern debug as needed.

Skills

scan insertion

ATPG

MBIST

test-mode integration

RTL design

CDC

synthesis

physical design flows

leadership

communication

Education

Electronics

Electrical

VLSI

Tools

Synopsys

Cadence

Job description

About Us

Tessolve offers a unique combination of pre-silicon and post-silicon expertise to provide an efficient turnkey solution for silicon bring-up, and spec to the product. With 3200+ employees worldwide, Tessolve provides a one-stop-shop solution with full-fledged hardware and software capabilities, including its advanced silicon and system testing labs.

About Us

Tessolve offers a unique combination of pre-silicon and post-silicon expertise to provide an efficient turnkey solution for silicon bring-up, and spec to the product. With 3200+ employees worldwide, Tessolve provides a one-stop-shop solution with full-fledged hardware and software capabilities, including its advanced silicon and system testing labs.

Tessolve offers a Turnkey ASIC Solution, from design to packaged parts. Tessolve's design services include solutions on advanced process nodes with a healthy eco-system relationship with EDA, IP, and foundries. Our front-end design strengths integrated with the knowledge from the backend flow, allows Tessolve to catch design flaws ahead in the cycle, thus reducing expensive re-design costs, and risks. We actively invest in the R&D center of excellence initiatives such as 5G, mmWave, Silicon photonics, HSIO, HBM/HPI, system-level test, and others. Tessolve also offers end-to-end product design services in the embedded domain from concept to manufacturing under an ODM model with application expertise in Avionics, Automotive, Industrial and Medical segments. Tessolve's Embedded Engineering services enable customers a faster time-to-market through deep domain expertise, innovative ideas, diverse embedded hardware & software services, and built-in infrastructure with world-class lab facilities.

Tessolve's clientele includes Tier 1 clients across multiple market segments, 9 of the top 10 semiconductor companies, start-ups, and government entities. We have a global presence over 12 countries with office locations in the United States, India, Singapore, Malaysia, Germany, United Kingdom, Canada, UK, Japan, Taiwan, Philippines, and Test Labs in India, Singapore, Malaysia, Austin, San Jose.

For more details, visit https://www.tessolve.com/

Job Overview

Join our innovative team as a Design-for-Test Manager in Bangalore, where you'll lead efforts to deliver exceptional DFT solutions for complex SoC and ASIC projects. Collaborate across various engineering teams to enhance methodologies and integrate cutting-edge DFT features. Your leadership will drive project success and customer satisfaction in a dynamic, global technology landscape.

Job Designation

Design-for-Test (DFT) Manager

Years of Exp

10+

Job Location

Bangalore

What You'll Do

• Lead the DFT team to deliver solutions across multiple ASIC projects.
• Oversee DFT architecture, planning, and verification processes.
• Collaborate with cross-functional teams to ensure smooth DFT integration.
• Review and optimize ATPG/MBIST/LBIST strategies.
• Initiate and drive methodology enhancements and automation.
• Manage project schedules, deliverables, and resources.
• Provide guidance, mentoring, and feedback to team members.
• Engage with clients on technical discussions and updates.
• Support post-silicon bring-up and pattern debug as needed.

Who You Are

• Expert in scan insertion, ATPG, MBIST, and test-mode integration.
• Experienced with industry-standard DFT/ATPG tools like Synopsys, Cadence.
• Proficient in RTL design, CDC, synthesis, and physical design flows.
• Proven leader in managing complex DFT programs.
• Strong problem-solving and communication skills.
• Background in silicon bring-up and production test is advantageous.
• Holds a degree in Electronics, Electrical, VLSI, or a related field.