Sr. Design Verification Engineer_Pune

Scaledge Technology; Pune District; On-site; INR 1,200,000 - 2,400,000; Full time

Job summary

Scaledge Technology is seeking an UVM verification specialist for ASIC and/or FPGA development in Pune, India. The role requires deep hands-on experience with SystemVerilog and UVM, plus familiarity with high-speed interfaces and verification techniques.

You will work with simulation tools such as VCS, Questa, and Xcelium to build robust testbenches, create coverages, assertions, and debug complex issues. Strong analytical and problem-solving skills are essential.

Qualifications

• 5+ years of experience in SystemVerilog and UVM
• Hands-on experience with high-speed interface protocols (PCIe, CXL, USB, DDR, Ethernet, AXI)
• Strong understanding of verification concepts, coverage, assertions, and debugging
• Experience with simulation tools (VCS, Questa, Xcelium)
• Strong analytical and problem-solving skills

Skills

SystemVerilog

UVM

Verification concepts

Coverage

Assertions

Debugging

High-speed interfaces

Tools

VCS

Questa

Xcelium

Job description

UVM Verification specialist for ASIC and/or FPGA development

• 5+ Years Experience in System Verilog and UVM methodology
• Hands-on expertise in high-speed interface protocols (PCIe / CXL/UCIE/USB / DDR / Ethernet / AXI, etc.)
• Good understanding of verification concepts, coverage, assertions, and debugging
• Experience with simulation tools (VCS, Questa, Xcelium, etc.)
• Strong analytical & problem-solving skills