SoC Verification Senior Lead Engineer

NXP Semiconductors; Bengaluru; On-site; INR 1,800,000 - 3,200,000; Full time

Job summary

NXP Semiconductors in Bengaluru, India seeks an experienced Verification Engineer (12+ years) to drive SoC/IP verification for complex SoCs. The role emphasizes ARM-based microcontrollers, low-power verification, and hands-on debug across RTL, power-aware RTL, and emulation platforms.

You will develop verification plans, build UVM environments, and mentor juniors while ensuring high coverage, DV closure, and collaboration with design teams in a fast-paced setting.

Qualifications

• 12-15 years in SoC/IP verification with participation in successful tape-outs of SoCs.
• Strong expertise in ARM-based microcontrollers and SoC-level verification, including C based DV.
• Proficiency in Verilog, SystemVerilog, UVM, and constrained-random verification.
• Familiarity with EDA tools (Synopsys VCS, Cadence Xcelium).
• Experience with low-power verification (UPF) is a must.
• Gate-level simulations and power-aware simulations is a must.
• Good working knowledge of assertions (SVA) and functional coverage.
• Verification of multiple interfaces: SPI, I²C, UART, CAN, eSPI is desirable.
• Knowledge of Flash memory and security IPs is nice to have.
• Any experience with common Analog IPs in microcontroller design (ADC, DAC, PLLs) is an added advantage.
• Soft Skills: Comfortable working in a fast-paced environment. Strong team player with excellent communication skills.
• Education: Bachelors or Master’s in Microelectronics, Electronics, Electrical Engineering

Responsibilities

• Develop and own SoC-level and/or IP-level verification suites with coverage goals.
• Execute verification plan according to product specifications and requirements.
• Develop, debug and run UVM based verification environment for RTL/netlist simulation.
• Define and develop test cases in an appropriate verification framework.
• Create stimulus and assertions, run simulation, debug test cases on RTL/ power-aware RTL.
• Run regression, collect and analyze code/functional coverage.
• Drive DV closure on diverse IPs and subsystems, ensuring maximum coverage and quality.
• Good understanding of formal verification techniques and methodologies.
• Collaborate with teams to develop flows for max reuse and efficiency.
• Mentor junior members and collaborate with design teams for issue resolution and sign-off.

Skills

ARM-based microcontrollers

SoC/IP verification

C DV

Verilog

SystemVerilog

UVM

constrained-random verification

Power-aware verification

Security IPs

Education

Bachelor's or Master’s in Microelectronics

Electronics

Electrical Engineering

Tools

Synopsys VCS

Cadence Xcelium

Job description

Role Overview

We are seeking an experienced Verification Engineer with 12+ years of experience for execution of SoC verification of complex SoCs. The ideal candidate will have deep knowledge of ARM-based microcontrollers, low-power design verification, and experience with multiple interfaces and security IPs. This is a hands‑on role requiring strong technical skills and collaboration in a fast‑paced environment.

Key Responsibilities

• Develop and own SoC-level and/or IP-level verification suites with coverage goals.
• Responsible for executing verification plan according to the product specification and verification requirements defined by product architects.
• Responsible for developing, debugging and running UVM based verification environment for RTL/netlist simulation.
• Define and develop test cases in an appropriate verification framework.
• Create stimulus and assertions, run simulation, debug test cases on the design models (RTL, power aware RTL, gate level, FPGA, Emulation platform), run regression, collect and analyze code/functional coverage.
• Drive DV closure on diverse IPs and subsystems, ensuring maximum coverage and quality.
• Good understanding of formal verification techniques and methodologies.
• Familiar with both SoC‑level and IP‑level verification environments.
• Collaborate with the team in developing and improving flows for maximum reuse and efficiency.
• Mentor junior team members while actively collaborating with design teams for issue resolution and sign‑off.

Required Qualifications

• Experience: 12-15 years in SoC/IP verification with participation in successful tape‑outs of SoCs.
• Technical Skills: Strong expertise in ARM-based microcontrollers and SoC-level verification, including C based DV.
• Proficiency in Verilog, SystemVerilog, UVM, and constrained-random verification.
• Familiarity with EDA tools (Synopsys VCS, Cadence Xcelium).
• Experience with low‑power verification (UPF) is a must.
• Gate‑level simulations and power‑aware simulations is a must.
• Good working knowledge of assertions (SVA) and functional coverage.
• Verification of multiple interfaces: SPI, I²C, UART, CAN, eSPI is desirable.
• Knowledge of Flash memory and security IPs is nice to have.
• Any experience with common Analog IPs in microcontroller design (ADC, DAC, PLLs) is an added advantage.
• Soft Skills: Comfortable working in a fast‑paced environment. Strong team player with excellent communication skills.
• Education: Bachelors or Master’s in Microelectronics, Electronics, Electrical Engineering

More information about NXP in India... #LI-29f4

NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer, and more sustainable world through innovation. As the world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets. For more information, visit www.nxp.com Bright Minds. Bright Futures. We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills.

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