Principle Engineer - SoC Design Verification

NXP Semiconductors; Pune District; On-site; INR 2,500,000 - 3,800,000; Full time

Job summary

NXP Semiconductors in Pune, India seeks a Principal DV Engineer with 10+ years of SoC verification experience to define strategy and lead DV execution for complex SoCs. You will architect and implement UVM-based environments, create test cases, and drive coverage across interfaces and security IPs.

The role requires hands-on verification, strong leadership, and collaboration with design teams to meet tight schedules in a fast-paced setting.

Qualifications

• 10+ years in SoC/IP verification with tape-outs.
• Strong expertise in ARM-based microcontrollers and SoC-level verification; SystemVerilog, UVM, constrained-random verification.
• Experience with EDA tools (Synopsys VCS, Cadence Xcelium, Mentor Questa) and low-power verification (UPF).

Responsibilities

• Define and own SoC/IP verification strategy, coverage goals, and verification plan.
• Hands-on execution of verification per product specs; develop, debug, and run UVM-based environment.
• Create stimulus and assertions; run simulations across RTL/netlist, power-aware RTL, gate level; perform regression and analyze coverage.
• Drive DV closure for diverse IPs and subsystems; mentor team members and collaborate with design teams.
• Ensure compliance with functional safety/security requirements.

Skills

ARM-based microcontrollers

SystemVerilog/UVM

Low-power verification

Constrained-random verification

EDA tools

Power-aware verification (UPF)

SVA assertions

Multiple interfaces (SPI, I2C, UART,/,

Security IPs (crypto engines)

Gate-level simulations

Education

Bachelor's or Master's in Microelectronics/Electronics/Electrical Engineering

Tools

Synopsys VCS

Cadence Xcelium

Mentor Questa

UPF

Job description

Job Title: Principal DV Engineer / Senior DV Engineer

Location: [Pune, India]

Role Overview

We are seeking a highly experienced Design Verification (DV) with 10+ years of expertise to lead verification strategy and execution for complex SoCs. The ideal candidate will have deep knowledge of ARM-based microcontrollers, low-power design verification, and experience with multiple interfaces and security IPs. This is a hands-on role requiring strong technical skills, leadership, and collaboration in a fast-paced environment.

Key Responsibilities

• Define and own SoC-level and IP-level verification strategy, methodology, and coverage goals.
• Hands-on work: Responsible for executing verification plan according to the product specification and verification requirements defined by product architects.
• Responsible for developing, debugging and running UVM based verification environment for RTL/netlist simulation.
• Define and develop test cases in an appropriate verification framework.
• Create stimulus and assertions, run simulation, debug test cases on the design models (RTL, power aware RTL, gate level, FPGA, Emulation platform), run regression, collect and analyze code/functional coverage.
• Drive DV closure on diverse IPs and subsystems, ensuring maximum coverage and quality.
• Familiar with both SoC-level and IP-level verification environments.
• Guide the team in developing and improving flows for maximum reuse and efficiency.
• Mentor team members while actively collaborating with design teams for issue resolution and sign-off.
• Ensure compliance with functional safety/security requirements.

Required Qualifications

• Experience: 10+ years in SoC/IP verification with successful tape-outs of multiple SoCs.
• Desirable Technical Skills: Strong expertise in ARM-based microcontrollers and SoC-level verification. Proficiency in SystemVerilog, UVM, and constrained-random verification. Familiarity with EDA tools (Synopsys VCS, Cadence Xcelium, Mentor Questa). Experience with low-power verification (UPF). Gate-level simulations and power-aware simulations. Strong knowledge of assertions (SVA) and functional coverage. Verification of multiple interfaces: SPI, I²C, UART, USB, PCIe, Ethernet, eSPI. Knowledge of Flash memory and security IPs (crypto engines and subsystems) is a plus Familiarity with common Analog IPs in microcontroller design (ADC, DAC, PLLs).
• Soft Skills: Comfortable working in a fast-paced environment. Strong team player with excellent communication skills.
• Education: Bachelors or Master’s in Microelectronics, Electronics, Electrical Engineering

Company Information

More information about NXP in India... #LI-2734

NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer, and more sustainable world through innovation. As the world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets. For more information, visit www.nxp.com

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