Senior Hardware Verification Engineer

NXP Semiconductors

Hyderabad

On-site

INR 3,000,000 - 6,000,000

Full time

14 days+
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Job summary

NXP Semiconductors in India is seeking a Senior ASIC Hardware Verification Engineer to architect advanced UVM-based testbenches and drive coverage closure for complex digital designs. You will lead verification plans, analyze waveforms, and collaborate with RTL teams to ensure tape-out readiness.

The role emphasizes scalable verification environments, constrained-random stimulus, and power-aware verification features such as UPF/CPF, with opportunities to mentor junior engineers and contribute

Qualifications

  • End-to-end verification of complex digital designs.
  • Architect scalable UVM-based testbenches and verification plans.
  • Lead coverage closure to meet architectural specs before tape-out.
  • Analyze waveforms with VPD/FSDB and root-cause failures.
  • Drive functional and code coverage to 100%.
  • Integrate Formal Verification and Hardware Emulation for long-latency tests.

Responsibilities

  • Define the verification plan (vPlan) with test scenarios and coverage models.
  • Architect reusable SystemVerilog/UVM environments.
  • Develop constrained-random and directed tests to stress micro-architecture.
  • Drive functional and code coverage to 100% and refine stimuli.
  • Verify throughput, latency, and UPF/CPF power features of the silicon.
  • Mentor junior engineers and perform testbench reviews.

Skills

SystemVerilog
UVM
Constrained-random testing
Functional coverage
Debugging complex designs

Tools

JasperGold
VC Formal
Palladium
Zebu

Job description

The Senior ASIC Hardware Verification Engineer is responsible for the end-to-end functional verification of complex digital designs (IP, Subsystem, or SoC). You will architect advanced UVM-based testbenches, define exhaustive verification plans, and lead the \"coverage closure\" process to ensure the design meets all architectural specifications before tape-out.

Key Responsibilities
  • Define and document the verification plan (vPlan), including test scenarios, checkers, and functional coverage models.
  • Architect and implement scalable, reusable verification environments using SystemVerilog and UVM.
  • Develop constrained-random stimulus and directed tests to stress-test corner cases of the micro-architecture.
  • Root-cause complex hardware failures by analyzing waveforms (VPD/FSDB) and collaborating with RTL designers.
  • Drive functional and code coverage to 100%, utilizing exclusions and refined stimulus to reach uncovered logic.
  • Verify throughput, latency, and power-aware (UPF/CPF) features of the silicon.
  • Integrate Formal Verification (JasperGold/VC Formal) for control logic and Hardware Emulation (Palladium/Zebu) for long-latency system tests.
  • Provide technical leadership to junior engineers and perform code reviews for testbench components.

More information about NXP in India... #LI-2734 NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer, and more sustainable world through innovation. As the world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets. For more information, visit www.nxp.com Bright Minds. Bright Futures. We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills.

Commitment At NXP. We recognize NXP is a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality.

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