Soc Verification Engineer | SOC Validation Engineer

Acesoft Labs; Hyderabad; On-site; INR 1,800,000 - 2,400,000; Full time

Job summary

Acesoft Labs in Hyderabad is seeking a Verification SME to lead the SoC verification process for next-generation HBM DRAM products. You will design test plans, build verification environments, and develop random and directed tests in RTL/GLS environments.

The role requires deep knowledge of SoC verification methodologies, testbench architecture, and 2.5D/3D package integration to ensure pre- and post-silicon quality for customers.

Qualifications

• BS in Electrical Engineering or a related equivalent field.
• 3+ years in writing tests & developing verification environments using SystemVerilog, UVM.
• 3+ years of experience with writing assertions and coverage.
• Strong and relevant expertise with SoC simulation tools and advanced verification methods.
• Experience in SoC/IP verification.

Responsibilities

• Develop test plans at SOC Level and analyze Coverage.
• Build verification environments to verify complex SOCs.
• Develop Random/Directed test in RTL and GLS environments.
• Review architectural specifications to ensure high quality.
• Work with customers to understand their verification & validation requirements.
• Debug and identify root causes and solutions for pre-silicon and post-silicon issues encountered in current HBM products and architectures.

Skills

SoC verification

testbench architecture

verification methodologies

HBM DRAM integration

SystemVerilog

UVM

Education

BS in Electrical Engineering or related field

Tools

SystemVerilog

UVM

Job description

Job Description

We're looking for a verification SME, responsible for the SoC verification process and designing the next-generation HBM DRAM products. Deep understanding of SoC Verification, testbench architecture, SoC verification methodologies, and 2.5D & 3D package integration.

Responsibilities

• Develop test plans at SOC Level and analyze Coverage.
• Build verification environments to verify complex SOCs.
• Develop Random/Directed test in RTL and GLS environments.
• Review architectural specifications to ensure high quality.
• Work with customers to understand their verification &validation requirements
• Debug and identify root causes and solutions for pre-silicon and post-silicon issues encountered in current HBM products and architectures.

Minimum Qualifications and skillsets

• BS in Electrical Engineering or a related equivalent field.
• relevant experience in SoC/IP verification.
• 3+ years in writing tests &developing verification environments using SystemVerilog, UVM.
• 3+ years of experience with the writing assertions and coverage.
• Strong and relevant expertise with SoC simulation tools and advanced verification methods.