Semiconductor Design Engineer (SOC Design + Verification Engineer)

Acesoft Labs

Hyderabad

On-site

INR 1,800,000 - 2,400,000

Full time

8 days ago
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Job summary

Acesoft Labs in Hyderabad is seeking an experienced SoC/IP verification engineer to join our hardware verification team. The role focuses on developing test plans, building verification environments, and creating directed and random RTL/GLS tests.

You will review architectural specs, drive coverage analysis, and collaborate with customers to define verification requirements while debugging pre- and post-silicon issues.

Qualifications

  • B.Tech in Electrical Engineering or related field.
  • 3+ years in SoC/IP verification using SystemVerilog and UVM.
  • Experience writing assertions and coverage analysis.
  • Strong expertise with SoC simulation tools and advanced verification methodologies.

Responsibilities

  • Develop SoC-level test plans and analyze coverage.
  • Build verification environments for complex SoCs.
  • Develop directed/random tests in RTL & GLS environments.
  • Review architectural specifications to ensure high quality.
  • Collaborate with customers to understand verification requirements.
  • Debug pre-silicon and post-silicon issues.

Skills

SystemVerilog
UVM
Assertions
Coverage analysis
SoC verification

Education

B.Tech in Electrical Engineering or related field

Job description

Location: Hyderabad

Experience: 3-7 Years

Responsibilities :
  • Develop SoC-level test plans and analyze coverage
  • Build verification environments for complex SoCs
  • Develop directed/random tests in RTL & GLS environments
  • Review architectural specifications to ensure high quality
  • Collaborate with customers to understand verification requirements
  • Debug pre-silicon and post-silicon issues
Skills :
  • B.Tech in Electrical Engineering or related field
  • 3+ years in SoC/IP verification using SystemVerilog and UVM
  • Experience writing assertions and coverage analysis
  • Strong expertise with SoC simulation tools & advanced verification methodologies
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