SoC/ IP Verification Engineer

Semicorelabs Innovation; Hyderabad, Chennai District, Bengaluru; On-site; INR 1,200,000 - 1,800,000; Full time

Job summary

Semicorelabs Innovation in India is seeking a skilled SoC/IP Verification Engineer with 3-6 years in ASIC/SoC or IP verification experience to join our team.

You will work with SystemVerilog, UVM, SVA, Low Power (UPF/CPF), GLS with SDF back-annotation, and Formal verification using JasperGold to develop robust verification environments and ensure functional and coverage closure.

Qualifications

• 3-6 years in ASIC/SoC Verification or IP Verification.
• Hands-on expertise in SystemVerilog, UVM, SVA, Low Power (UPF/CPF), GLS, and Formal Verification.
• Experience in DDR/PCIe protocol verification and coverage-driven verification.

Responsibilities

• Develop and execute verification plans for complex SoC/IP designs.
• Build and maintain SystemVerilog/UVM-based verification environments.
• Perform Low Power Verification using UPF/CPF methodologies.
• Execute Gate-Level Simulation (GLS) with SDF back-annotation.
• Verify low-power netlists, including isolation, retention, level shifters, and DFT-inserted logic.
• Perform protocol verification for DDR and PCIe interfaces.
• Use JasperGold for formal verification, connectivity checking, and coverage closure.
• Develop reusable verification components, including BFMs, monitors, checkers, scoreboards, and coverage models.
• Debug RTL, GLS, and formal verification issues.
• Collaborate with architects, RTL designers, and pre/post-silicon teams.
• Develop automation scripts using Python or Perl to improve verification flows.

Skills

SoC/IP Verification

ASIC Verification

SystemVerilog (SV)

UVM

SystemVerilog Assertions (SVA)

Low Power Verification (UPF/CPF)

Gate-Level Simulation (GLS)

RTL Verification

Formal Verification (JasperGold)

DDR & PCIe Protocol Verification

Functional Coverage & CDV

Python/Perl Scripting

Debugging & Analytics

Communication & Teamwork

Education

BE/B.Tech in Electronics & Communication Engineering

ME/M.Tech in Electronics & Telecommunication Engineering

Tools

JasperGold

Job description

Job Title

SoC/IP Verification Engineer (Low Power, GLS/RTL, Formal)

Experience

Experience: 3-6 years in ASIC/SoC Verification or IP Verification.

Job Summary

We are looking for a skilled SoC/IP Verification Engineer with strong experience in ASIC/SoC verification methodologies. The ideal candidate should have hands-on expertise in SystemVerilog, UVM, SVA, Low Power Verification (UPF/CPF), Gate-Level Simulation (GLS), and Formal Verification. The role involves developing robust verification environments, validating complex SoC/IP designs, ensuring protocol compliance, and achieving functional and coverage closure.

Roles & Responsibilities

• Develop and execute verification plans for complex SoC/IP designs.
• Build and maintain SystemVerilog/UVM-based verification environments.
• Perform Low Power Verification using UPF/CPF methodologies.
• Execute Gate-Level Simulation (GLS) with SDF back-annotation.
• Verify low-power netlists, including isolation, retention, level shifters, and DFT-inserted logic.
• Perform protocol verification for DDR and PCIe interfaces.
• Use JasperGold for formal verification, connectivity checking, and coverage closure.
• Develop reusable verification components, including BFMs, monitors, checkers, scoreboards, and coverage models.
• Debug RTL, GLS, and formal verification issues.
• Collaborate with architects, RTL designers, and pre/post-silicon teams.
• Develop automation scripts using Python or Perl to improve verification flows.

Preferred Skills

• SoC/IP Verification
• ASIC Verification
• SystemVerilog (SV)
• UVM
• SystemVerilog Assertions (SVA)
• Low Power Verification (UPF/CPF)
• Gate-Level Simulation (GLS)
• RTL Verification
• Formal Verification (JasperGold)
• DDR & PCIe Protocol Verification
• Functional Coverage & Coverage-Driven Verification (CDV)
• Python/Perl Scripting
• Strong debugging and analytical skills
• Excellent communication and teamwork

Educational Qualification

• B.E./B.Tech or M.E./M.Tech in Electronics & Communication Engineering (ECE),
• M.E./M.Tech in Electronics & Telecommunication Engineering (ETE)