Silicon DFT Engineer, PhD, Google Cloud

Google LLC; Bengaluru; On-site; INR 4,000,000 - 8,000,000; Full time

Job summary

Google LLC in Bengaluru, India seeks a Share Silicon DFT Engineer, PhD, to advance AI/ML hardware acceleration and TPU integration. You will work with architecture and silicon teams to verify complex digital designs and drive DFT/DFX features for large-scale SoCs.

Responsibilities include LBIST/MBIST validation, research on ML-based DFT models, and collaboration with EDA vendors to define testability specs and improve yield through advanced diagnostics.

Qualifications

• PhD in Electronics and Communication Engineering, Electrical Engineering, Computer Engineering or related field (or equivalent practical experience).
• Experience with programming languages C++, Python, Verilog and EDA tools.

Responsibilities

• Work with a group of architecture and silicon engineers to develop next-generation DFT/DFX features for large-scale SoCs.
• Design and implement software and hardware validation solutions for advanced testing, including LBIST, MBIST, and Scan compression.
• Research, develop, and integrate machine learning or semi-analytical models to solve complex DFT challenges.
• Triage, debug, and resolve high-priority post-silicon yield and structural failures by driving advanced FA and volume diagnostics.
• Write and review technical specifications for SoC testability and partner with EDA vendors.

Skills

C++

Python

Verilog

Education

PhD in ECE/EE/CE or related field

Tools

Synopsys tools

Cadence tools

Job description

Share Silicon DFT Engineer, PhD, Google Cloud

• PhD degree in Electronics and Communication Engineering, Electrical Engineering, Computer Engineering or related technical field, or equivalent practical experience.
• Experience in programming languages (e.g., C++, Python, Verilog), Synopsys, Cadence tools.

Preferred qualifications:

• 2 years of experience in Silicon Engineering post PhD.
• Experience with Electronic Design Automation (EDA) tools in design, verification, DFT and implementation.
  
• Design for Test (DFT) knowledge (Boundary Scan, ATPG, MBIST).

About the job

In this role, you’ll work to shape the future of AI/ML hardware acceleration. You will have an opportunity to drive TPU (Tensor Processing Unit) technology that powers Google's most demanding AI/ML applications. You’ll be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's TPU. You'll contribute to the innovation behind products loved by millions worldwide, and leverage your design and verification expertise to verify complex digital designs, with a specific focus on TPU architecture and its integration within AI/ML-driven systems.

The AI and Infrastructure team is redefining what’s possible. We empower Google customers with breakthrough capabilities and insights by delivering AI and Infrastructure at unparalleled scale, efficiency, reliability and velocity. Our customers include Googlers, Google Cloud customers, and billions of Google users worldwide.

We're the driving team behind Google's groundbreaking innovations, empowering the development of our AI models, delivering unparalleled computing power to global services, and providing the essential platforms that enable developers to build the future. From software to hardware our teams are shaping the future of world-leading hyperscale computing, with key teams working on the development of our TPUs, Vertex AI for Google Cloud, Google Global Networking, Data Center operations, systems research, and much more.

Responsibilities

• Work with a group of architecture and silicon engineers to develop next-generation DFT/DFX features for large-scale SoCs.
• Design and implement software and hardware validation solutions for advanced testing, including logic BIST (LBIST), memory BIST (MBIST), and Scan compression.
• Research, develop, and integrate machine learning or semi-analytical models to solve complex DFT challenges.
• Triage, debug, and resolve high-priority post-silicon yield and structural failures by driving advanced failure analysis (FA) and volume diagnostics.
• Write and review technical specifications for SoC testability and partner with EDA vendors.

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire .

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.

X In most instances, this position requires in-person interviews as part of the hiring process.