Silicon Design Verification Engineer

Intel Corporation; Bengaluru; Híbrido; INR 1.500.000 - 2.500.000; Jornada completa

Descripción de la vacante

Intel Corporation in India is seeking an experienced hardware verification professional to join the Devices Development Group. You will validate DFx features, develop validation plans, and debug RTL and silicon issues to ensure high-quality SoC designs for next-generation client technologies.

The role involves working with IP providers, developers, and customers to define infrastructure and testing strategies, with a hybrid on-site/off-site work model in Bengaluru.

Formación

• BS + 5 years or MS + 3 years in Computer Science, Computer Engineering or Electrical Engineering.
• 3+ years reading and interpreting technical specs and RTL code.
• 3+ years IP/SoC development, verification, or integration using Verilog/SystemVerilog/OVM/UVM.
• 3+ years writing validation plans and software to implement those plans.
• 1+ year UNIX or Linux experience.

Responsabilidades

• Validate DFx features such as Scan, SBFT, TAP, Arrays, Fuse, MBIST using simulation or emulation.
• Create plans and tests for validating portions of a complex microarchitecture from specs and RTL code.
• Debug failures to root cause by examining architecture and microarchitecture.
• Develop and use DFT and validation tools to implement validation plans for solid designs.
• Participate in silicon debug and develop testing strategies for RTL models.
• Engage with IP providers and customers to define and deliver necessary infrastructure.
• Develop tools to streamline IP development and SOC integration.
• Develop debugging tools and software.

Conocimientos

RTL expertise

Verilog/SystemVerilog

UVM/OVM

DFx validation

UNIX/Linux

IP/SoC development

Debugging

Educación

BS + 5 yrs or MS + 3 yrs in CSE/CE/EE

Herramientas

Verilog

SystemVerilog

OVM/UVM

Descripción del empleo

Job Details:

Job Description:

Come join Intel's Devices Development Group, responsible for creating leading Client SOCs. We envision the future of computing and design for the next generation of laptop and desktop computers. We are looking for a ready to research, design, develop, and test Intel designs as we reimagine how to build SOCs at Intel and in the semiconductor industry. Our bold purpose as a company is to 'create world-changing technology that enriches the lives of every person on earth' and this role is instrumental in furthering our mission to shape the future of technology.

Responsibilities may include but not be limited to:

• Validation of DFx features such as Scan, SBFT,TAP, Arrays, Fuse, MBIST etc..using simulation, emulation
• Creating plans and tests for validating portions of a complex microarchitecture using written specs, RTL code and other tests as a guide
• Learning the architecture and microarchitecture by debugging failures to the root cause
• Developing and utilizing various DFT and validation tools and/or methodologies to implement validation plans with the goal being to ensure a solid design
• Participating in the debug of failures on silicon and developing new testing strategies to detect these failures on RTL models
• Engaging with IP providers and customers to define, develop and deliver necessary infrastructure and address issues found during execution
• Developing tools and methods to streamline IP development and SOC integration to deliver highest quality in shortest time possible
• Developing debugging tools and software

Qualifications:

Minimum Qualifications:

• Must have either a BS + 5 years experience or MS + 3 years experience in Computer Science, Computer Engineering or Electrical Engineering
• Minimum 3 years experience with reading and interpreting technical specs and Register Transfer Level (RTL) code
• Minimum 3 years experience working on IP or SoC development, verification, or integration using Verilog/SystemVerilog/OVM/UVM
• Minimum 3 years experience with writing validation plans and software to implement those validation plans
• Minimum 1 year experience with UNIX or Linux

Preferred Qualifications:

• Minimum 1 year experience with computer architecture
• Minimum 1 year experience with IA-32 assembly and/or Verilog programming experience
• Minimum 2 years experience with validation or testing experience, especially in a silicon design team
• 3yrs+ experience with industry standards such as Scan, JTAG, BScan
• Experience in Coherency

Job Type:

Experienced Hire

Shift:

Shift 1 (India)

Primary Location:

India, Bangalore

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

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