Mixed Signal IP Verification Engineer

Intel Corporation; Bengaluru; Hybrid; INR 2,500,000 - 4,500,000; Full time

Job summary

Intel Corporation in Bengaluru, India, is seeking an experienced Mixed Signal IP Verification Engineer to lead verification of Power Delivery IPs and collaborate with RTL and Analog Design teams. The role emphasizes AMS activities, test plan development, and pre-silicon debugging in a hybrid work environment.

The candidate should have 3+ years in design verification with UVM/SystemVerilog and hands-on experience with Mixed Signal IPs, RTL/BMOD understanding, and strong documentation skills.

Qualifications

• Minimum 3 years in Design Verification and Validation with UVM and SystemVerilog.
• Hands-on experience with Mixed Signal IPs and AMS activities.
• Ability to read RTL and Behavioral Model (BMOD) code.
• Experience writing validation plans and executing them.

Responsibilities

• Perform functional verification of Mixed Signal Power Delivery IPs (Voltage Regulator, ADC, DAC).
• Develop test plans, stimuli, and checkers to ensure coverage and spec conformance.
• Collaborate with RTL and Analog Design Engineers to verify architectural features.
• Debug in pre-silicon verification and document test plans for reviews.
• Lead or participate in Mixed Signal Validation activities and AMS simulations.
• Maintain and refine verification infrastructure for multiple IP generations.
• Contribute to defining IP architecture and microarchitecture.

Skills

UVM

SystemVerilog

RTL

AMS verification

EDA tools

Education

Bachelor's degree in Electrical/Computer Engineering

Master's degree in Electrical/Computer Engineering

Tools

AMS simulators

Industry standard EDA tools

Job description

Job Details: Job Description:

Come join Intel's Devices Development Group, responsible for creating leading Client SOCs. We envision the future of computing and design for the next generation of laptop and desktop computers. We are looking for a Mixed Signal IP Verification Engineer, ready to research, design, develop, and test Intel designs as we reimagine how to build SOCs at Intel and in the semiconductor industry. Our bold purpose as a company is to 'create world-changing technology that enriches the lives of every person on earth' and this role is instrumental in furthering our mission to shape the future of technology.

Responsibilities may include but not be limited to:

• Perform functional verification of Mixed Signal Power Delivery IPs (like Voltage Regulator, ADC, DAC) to ensure design meets specification.
• Proactively and independently develop test plan, add stimuli, add checkers/assertions to ensure adequate coverage and verify compliance with IP microarchitecture specifications.
• Collaborate with RTL developers, Analog Design Engineers to improve verification of architectural and microarchitectural features.
• Replicate, root cause, and debug issues in the pre-silicon verification environment.
• Document test plans and participate in technical reviews with design teams.
• Lead or be willing to lead Mixed Signal Validation(MSV) activities by running AMS simulations, collaborate cross-functionally with design teams to identify, root-cause and resolve schematic bugs.
• Maintain and refine existing functional verification infrastructure and methodology for multiple IP generations.
• Actively participate in defining the architecture and microarchitecture of the IP being developed.

Qualifications:

You must possess the below minimum qualifications to be initially considered for this position. Preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

• Must have either a Bachelor's degree with 5+ years of experience or Master's degree with 3+ years of experience in Electrical Engineering or Computer Engineering
• Minimum 3 years of experience in Design Verification and Validation methodologies with UVM, System Verilog and industry standard EDA tools
• Minimum 3 years of hands-on experience working on Mixed Signal IPs and driving AMS activities
• Minimum 3 years of experience with reading and interpreting technical specs and Register Transfer Level (RTL) code and Behavioral Model (BMOD) code
• Minimum 3 years of experience with writing validation plans and implement those validation plans

Preferred Qualifications:

• Experience with Design Verification of both Digital and Mixed Signal IPs
• Strong ability to communicate technical analysis and conclusions clearly to stakeholders
• Excellent self-organizing and time management skills
• Proficient in using AI tools to boost automation and efficiency

Job Type: Experienced Hire Shift: Shift 1 (India) Primary Location: India, Bangalore Additional Locations:

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation or any other characterizations local law, regulation, or ordinance.

Position of Trust

N/A

Work Model for this Role

This role will be eligible for hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site.

Job posting details (such as work model, location or time type) are subject to change.

ADDITIONAL INFORMATION:

Intel is committed to Responsible Business Alliance (RBA) compliance and ethical hiring practices. We do not charge any fees during our hiring process. Candidates should never be required to pay recruitment fees, medical examination fees, or any other charges as a condition of employment. If you are asked to pay any fees during our hiring process, please report this immediately to your recruiter.