Senior Staff Engineer - DFT

Infineon Technologies AG; Bengaluru; Vor Ort; INR 3.500.000 - 7.500.000; Vollzeit

Zusammenfassung

Infineon Technologies AG in Bengaluru seeks an experienced DFT/SoC engineer to define and verify DFT architecture for complex chips, including scan insertion and JTAG integration. You will lead verification and post-silicon debugging across the full chip, collaborating with cross-functional teams.

The role demands a deep ASIC design flow understanding, hands-on ATPG/MBIST experience, and scripting skills (Perl/Tcl/Python) for testability automation.

Qualifikationen

• Bachelor’s degree in Electrical/Electronics or Master’s in VLSI Design as specified.
• 12+ years of experience in DFT implementation, verification, and post-silicon debug.
• Strong understanding of the complete ASIC design flow.
• Experience with LEC, CLP, and power analysis methodologies is highly desirable.
• Proven expertise delivering complex SoC designs with DFT specs and debug.

Aufgaben

• Define/implement/verify/debug SoC DFT architecture for SoC/Full Chip.
• Implement Scan insertion, LPCT, LBIST, Hybrid-TK, Compression Logic and DRC analysis.
• ATPG, DRC analysis, test coverage debug, Memory BIST implementation and verification.
• Own JTAG/BSCAN/iJTAG, P1500 implementation and verification; handle stuck-at/TDF/bridging models.
• Debug skills in ZERO delay and SDF-based scan/MBIST/JTAG simulations; post-silicon debug.

Kenntnisse

DFT implementation

ASIC design flow

Post-silicon debug

Scripting: Perl, Tcl, Python

Ausbildung

B.E./B.Tech. in Electrical/Electronics or M.E./M.Tech. in VLSI Design

Tools

LEC

CLP

Power analysis methodologies

Jobbeschreibung

#WeAreIn to leverage synergies contributing to Infineon’s product development. Are you in?

Your role

Key responsibilities in your new role

• Responsible for SoC DFT Architecture definition/implementation/verification/silicon debug of SoC/Full Chip
• Need to implement Scan insertion, LPCT, LBIST, Hybrid-TK, Compression Logic and DRC analysis of implemented Testability logic structures
• Responsible for ATPG, DRC analysis, Test coverage debug, Memory BIST implementation and verification
• Owner ship of JTAG/BSCAN/iJTAG, P1500 implementation and verification, Stuck at/TDF/Bridging/Cell-aware/iddq fault models
• Good debug skills in ZERO delay and SDF based scan/MBIST/JTAG simulations
• Hands on experience in analysis and debug of above-mentioned test domains
• Hands of experience in post silicon debug of scan/MBIST patterns/yield fall out

Your profile

Qualifications And Skills To Help You Succeed

• Bachelor's degree (B.E./B.Tech.) in Electrical/Electronics Engineering or Master's degree (M.E./M.Tech.) in VLSI Design or a related field
• 12+ years of experience in DFT implementation, verification, and post-silicon debug
• Strong understanding of the complete ASIC design flow
• Hands-on experience with LEC, CLP, and power analysis methodologies is highly desirable
• Proven expertise in delivering complex SoC designs, encompassing DFT specification development, implementation, verification, and post-silicon debug
• Self-driven professional with a passion for continuously improving DFT methodologies and design processes
• Excellent analytical and problem-solving abilities, with the capability to work independently, manage multiple priorities, and collaborate effectively within cross-functional teams
• Strong interpersonal and teamwork skills, with the ability to thrive in a diverse and dynamic work environment
• Proficiency in scripting languages such as Perl, Tcl, and Python is preferred

#WeAreIn for driving decarbonization and digitalization.

As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener.

Are you in?

We are on a journey to create the best Infineon for everyone.

We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity.

Learn more about our various contact channels and about Diversity & Inclusion at Infineon.