Principal Engineer Design-Synthesis, LEC & CLP

Infineon Technologies AG; Bengaluru; On-site; INR 3,500,000 - 6,000,000; Full time

Job summary

Infineon Technologies AG in Bengaluru seeks an experienced RTL2GDS Frontend expert with 10+ years in Synthesis, LEC, and Low Power Verification for complex SoCs. You will own front-end flows, drive convergence, and collaborate with RTL, STA, DFT, and PD teams to ensure smooth tape-out.

The role requires strong automation skills with Tcl/Python/Perl and hands-on use of Cadence and Synopsys toolchains. Join a global semiconductor leader delivering high-quality designs on advanced nodes.

Qualifications

• 10+ years of RTL-to-GDS front-end implementation for complex SoC designs.
• Hands-on experience with Synthesis, LEC, and Low Power Verification (CLP).
• Strong experience with Cadence Genus and Conformal LEC/CLP; Synopsys tools also used.
• Ability to manage cross-functional dependencies and prioritize issues.
• Proficient in Tcl, Python, and/or Perl for automation.

Responsibilities

• Develop, enhance, and maintain front-end design flows and automation frameworks.
• Drive synthesis convergence and support design optimization across advanced technology nodes.
• Perform design bring-up, debug, and issue resolution throughout the implementation cycle.
• Execute and close Logic Equivalence Check (LEC) and low-power verification.
• Collaborate with RTL, STA, DFT, and PD teams to ensure seamless design integration.
• Analyze and debug design, flow, and tool-related issues with scalable solutions.
• Develop reusable methodologies, automation solutions, and best practices to improve efficiency.
• Support design signoff activities and ensure adherence to timelines and quality goals.

Skills

RTL2GDS

Synthesis

LEC

Low Power

CLP

Tcl

Python

Perl

Cadence Genus

Conformal LEC

Design Compiler

Fusion Compiler

Formality

UPF/CPF

Education

Bachelor’s or Master’s in Electrical/Electronics/Microelectronics

Tools

Cadence Genus

Conformal LEC/CLP

Design Compiler

Fusion Compiler

Formality

Job description

#WeAreIn to transform theoretical concepts into real hardware designs. Are you in? We are looking for an experienced RTL2GDS Frontend expert with 10+ years of hands‑on experience in Synthesis, LEC, and Low Power Verification (CLP) for complex SoC designs.

Your role

Key responsibilities in your new role

• Develop, enhance, and maintain front-end design flows and automation frameworks to improve productivity and design quality.
• Drive synthesis convergence and support design optimization across advanced technology nodes.
• Perform design bring-up, debug, and issue resolution throughout the implementation cycle.
• Execute and close Logic Equivalence Check (LEC) and low-power verification activities.
• Collaborate closely with RTL, STA, DFT, and Physical Design (PD) teams to ensure seamless design integration and execution.
• Analyze and debug design, flow, and tool-related issues, providing timely and scalable solutions.
• Develop reusable methodologies, automation solutions, and best practices to improve design efficiency and scalability.
• Support design signoff activities and ensure adherence to project timelines and quality goals.

Your profile

• Bachelor’s or Master’s degree in Electrical Engineering, Electronics Engineering, Microelectronics , or a related field.
• 10+ years of experience in RTL-to-GDS (RTL2GDS) front-end implementation for complex SoC designs.
• Strong technical expertise across the complete RTL2GDS design flow, with a deep understanding of front-end implementation methodologies.
• Hands‑on experience in Synthesis, LEC, and Low Power Verification (CLP) for large‑scale and complex SoC projects.
• Proven ability to proactively manage cross‑functional dependencies, resolve technical conflicts, and effectively prioritize issues across multiple stakeholders.
• Extensive experience with both Cadence (Genus, Conformal LEC/CLP) and Synopsys (Design Compiler/Fusion Compiler, Formality) tool flows.
• Solid understanding of MCMM methodologies, UPF/CPF, timing constraints, power intent verification, and advanced‑node implementation flows.
• Strong programming and automation skills using Tcl, Python, and/or Perl, with demonstrated expertise in developing scalable and reusable automation solutions.
• Excellent debugging and problem‑solving skills, with the ability to drive synthesis convergence, closure activities, and design quality improvements.
• Experience working closely with STA, DFT, Physical Design (PD), and RTL teams to ensure seamless project execution and successful tape‑out.

#WeAreIn for driving decarbonization and digitalization. As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game‑changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener. Are you in? We are on a journey to create the best Infineon for everyone. We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity.

Our hiring decisions are based on skills and experience. Please let your recruiter know if you need any accommodations during the interview process.

Learn more about our various contact channels and about Diversity & Inclusion at Infineon.