Senior Staff Engineer

Infineon Technologies; Bengaluru; On-site; INR 1,800,000 - 2,800,000; Full time

Job summary

Infineon Technologies in Bengaluru seeks a DFT Engineer to develop robust design-for-test solutions for complex SoCs. You will work with Design, Verification, and Backend teams to ensure high test coverage and seamless silicon bring-up.

The role requires 6–9+ years in DFT/ASIC/SoC design, proficiency in Scan Architecture, ATPG, MBIST, IJTAG, and hands-on experience with Tessent, TetraMAX, Genus, Questa, and Xcelium.

Qualifications

• 6–9+ years of hands-on DFT/ASIC/SoC experience
• Strong RTL design fundamentals and test architectures
• Expertise in Scan Architecture, DFT DRC closure and Boundary Scan (JTAG) implementation

Responsibilities

• Develop and implement DFT architectures and methodologies for complex SoCs
• Collaborate with Design, Verification, and Backend teams to integrate DFT features
• Create, execute and validate test strategies for high fault coverage
• Perform scan insertion, DRC analysis, and DFT issue resolution
• Drive ATPG, MBIST and IJTAG implementation, validation, and sign-off
• Analyze and optimize test coverage across IP, subsystem and SoC levels
• Support silicon bring-up, characterization and debug activities
• Develop automation scripts to scale DFT flows

Skills

Digital design fundamentals

RTL design concepts

Test architecture

ATPG

MBIST

IJTAG

Verilog/VHDL

Python scripting

Perl scripting

TCL scripting

Boundary Scan

Cross-functional collaboration

Education

Bachelor's in Electrical/ECE

Master's in VLSI specialization

Tools

Siemens Tessent

Synopsys TetraMAX

Cadence Genus

Siemens Questa

Cadence Xcelium

Job description

We are seeking a highly motivated DFT Engineer to develop and deploy robust Design-for-Test solutions for complex SoC/ASIC products. The ideal candidate will work closely with Design, Verification, and Physical Design teams to ensure high test coverage, efficient manufacturability, and successful silicon bring-up.

Your role

Key responsibilities in your new role :

• Develop and implement comprehensive Design-for-Test (DFT) architectures and methodologies for complex SoCs.
• Collaborate with Design, Verification, and Backend teams to seamlessly integrate DFT features into the chip design flow.
• Create, execute, and validate test strategies to achieve high fault coverage and reliable defect detection.
• Perform scan insertion, DRC analysis, and resolution of DFT-related issues.
• Drive ATPG, MBIST, and IJTAG implementation, validation, and sign-off activities.
• Analyze and optimize test coverage at the IP, subsystem, and SoC levels to meet quality and manufacturing targets.
• Support silicon bring-up, characterization, and debug activities to ensure successful product ramp-up.
• Develop and maintain automation scripts to improve the efficiency and scalability of DFT flows.

Your profile

Qualifications And Skills To Help You Succeed

• Bachelor's degree in Electrical Engineering, Electronics & Communication Engineering (ECE), or a Master's degree with specialization in VLSI.
• 6 to 9+ years of hands-on experience in DFT and ASIC/SoC design and implementation.
• Strong understanding of digital design fundamentals, RTL design concepts, simulation methodologies, and test architectures.
• Expertise in Scan Architecture, Scan Insertion, DFT DRC closure, Boundary Scan (JTAG) implementation, validation, and debug.
• Proficient in ATPG generation, fault coverage analysis, MBIST insertion, verification, and debug.
• Experience in IJTAG integration, verification, and sign-off activities.
• Hands on experience with industry standard DFT tools including Siemens Tessent, Synopsys TetraMAX, and Cadence Genus.
• Strong knowledge of simulation and validation tools such as Siemens Questa and Cadence Xcelium.
• Proficient in hardware description languages including Verilog/VHDL.
• Strong scripting skills in Perl, TCL, and Python for automation and flow development.
• Excellent analytical, debugging, and problem-solving abilities with a proven track record of resolving complex design and test challenges.
• Effective communication and collaboration skills, with experience working across cross-functional teams including Design, Verification, Physical Design, and Test Engineering.

#WeAreIn for driving decarbonization and digitalization.

As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener.

Are you in?

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We strive to create the best Infineon for everyone by embracing diversity and inclusion. We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity.

Our hiring decisions are based on skills and experience.

Please let your recruiter know if you need any accommodations during the interview process.

Learn more about our various contact channels and about Diversity & Inclusion at Infineon.

Anand Rawal