Senior Physical Design Engineer - Mumbai

N Human Resources & Management Systems; Mumbai; On-site; INR 3,000,000 - 5,000,000; Full time

Job summary

N Human Resources & Management Systems in Mumbai is seeking a Senior Physical Design Engineer to own full-chip and block-level PnR flows, drive timing and signoff, and collaborate with cross-functional design teams on advanced-node tapeouts.

You will lead floorplanning, placement, CTS, and routing using ICC2 and Innovus, ensure STA/power/IR-drop closure, and help resolve timing and congestion while coordinating with CAD and IP groups.

Qualifications

• 4+ years of hands-on Physical Design experience across Synthesis-to-GDSII.
• Strong command of ICC2 and Innovus.
• Experience taking multiple chips to tapeout on advanced nodes.
• Solid understanding of STA, power and signal-integrity closure.
• Bachelor's or Master's degree in EE/ECE or related field.

Responsibilities

• Lead floorplanning, placement, CTS, routing, and physical design implementation.
• Drive STA, IR-drop/EM, and physical verification signoff.
• Resolve timing, congestion and power closure issues.
• Collaborate with CAD, methodology and IP teams on delivery cadence.

Skills

Physical Design

Synthesis-to-GDSII

Tapeout experience

STA/Signoff knowledge

Education

Bachelor's/Master's in EE/ECE or related field

Tools

ICC2

Innovus

Job description

N Human Resources & Management Systems | Full time

Senior Physical Design Engineer - Mumbai

We are looking for a Senior Physical Design Engineer to join our VLSI delivery team. You will own full-chip and block-level PnR flows, drive timing/power/signoff closure, and collaborate with cross-functional design teams on advanced-node tapeouts.

Key Responsibilities:

• - Lead floorplanning, placement, CTS, routing and physical design implementation using Synopsys ICC2/Cadence Innovus
• - Drive STA, IR-drop/EM, and physical verification signoff
• - Resolve timing, congestion and power closure issues
• - Collaborate with CAD, methodology and IP teams on delivery cadence

Requirements:

• - 4+ years of hands-on Physical Design experience across Synthesis-to-GDSII
• - Strong command of ICC2/Innovus
• - Experience taking multiple chips to tapeout on advanced nodes
• - Solid understanding of STA, power and signal-integrity closure
• - Bachelor's/Master's in EE/ECE or related field