Senior Engineer Design

Infineon Technologies AG; Bengaluru; On-site; INR 900,000 - 1,400,000; Full time

Job summary

Infineon Technologies AG in Bengaluru seeks a senior STA engineer to own and drive timing signoff methodologies for production platforms. You will develop scalable flows, automate validation, and collaborate with global R&D teams to ensure high-quality STA solutions.

The role requires deep experience in MMMC setup, setup/hold analysis, OCV/AOCV/POCV, and regression frameworks, with strong Tcl, Python, and Linux scripting capabilities.

Qualifications

• Experience building and maintaining STA flows and signoff methodologies.
• Proficiency in regression testing, QoR analysis, and timing debugging.
• Strong scripting skills in Tcl/Python/Linux and tool integration.

Responsibilities

• Own and drive STA methodology initiatives, including roadmap planning and deployment of new features.
• Develop, qualify, and deploy scalable timing signoff methodologies for production.
• Automate flow validation, regression testing, and STA infrastructure.
• Collaborate with cross-site teams to deliver production-quality STA solutions.

Skills

Tcl

Python

Linux scripting

Tools

Cadence

Job description

#WeAreIn to transform theoretical concepts into real hardware designs. Are you in?

Your role

• Own and drive STA flow and signoff methodology for HOBTO and Bixby Creek platforms.
• Develop, qualify, and deploy scalable timing signoff methodologies.
• Automate flow validation, regression testing, and STA infrastructure.
• Collaborate with Physical Design, Design Signoff, and global R&D; teams to deliver production-quality STA solutions.
• Improve flow efficiency, accuracy, and robustness through continuous methodology enhancements.

Your profile

• Own and drive STA methodology initiatives, including roadmap planning, issue resolution, and deployment of new features.
• Develop and maintain STA flows encompassing MMMC setup, setup/hold analysis, OCV/AOCV/POCV implementation, SI-aware timing analysis, and voltage-aware STA methodologies.
• Design, enhance, and support reusable STA infrastructure, automation solutions, and regression frameworks using Tcl, Python, and Linux scripting.
• Plan and execute regression testing for methodology updates and tool-version qualifications; analyze QoR correlations and debug timing discrepancies.
• Collaborate with Cadence R&D and internal stakeholders to investigate tool issues, track JIRs, and validate fixes.
• Drive improvements in flow runtime, scalability, and robustness while ensuring signoff-quality standards are maintained.
• Represent the India STA Methodology team in technical reviews and lead cross-site collaboration to ensure technical alignment and best-practice adoption.

#WeAreIn for driving decarbonization and digitalization.

As a global leader in semiconductor solutions in power systems and IoT, Infineon enables game-changing solutions for green and efficient energy, clean and safe mobility, as well as smart and secure IoT. Together, we drive innovation and customer success, while caring for our people and empowering them to reach ambitious goals. Be a part of making life easier, safer and greener.

We are on a journey to create the best Infineon for everyone.

We strive to create the best Infineon for everyone by embracing diversity and inclusion.

We welcome applicants for who they are and offer a workplace built on trust, openness, respect and equal opportunity.

Our hiring decisions are based on skills and experience.

Even if you don't meet every requirement, we encourage you to apply.

Please let your recruiter know if you need any accommodations during the interview process.

Learn more about our various contact channels and about Diversity & Inclusion at Infineon.