Senior Design Verification Engineer

Google; Bengaluru; On-site; INR 3,500,000 - 5,500,000; Full time

Job summary

Google LLC in Bengaluru is seeking a Senior Design Verification Engineer to shape verification strategies across full-chip and subsystem levels. You will architect SystemVerilog/UVM environments and create bit-accurate reference models, enabling robust pixel-processing pipelines for AR/VR hardware platforms.

The role emphasizes hands-on development using DPI-C, constrained-random stimulus, and coverage-driven verification, contributing to high-performance, low-latency silicon powering Google’s

Qualifications

• Bachelor's degree in Electrical Engineering or Computer Engineering or equivalent practical experience.
• Experience with ultra-low latency, high-density micro-display technologies.
• Experience transitioning UVM testbenches to hardware emulation platforms.
• Experience with scripting languages such as Python or Perl or Makefile.

Responsibilities

• Define comprehensive verification strategies, test architectures, and detailed test plans covering full chip, subsystem, and block levels.
• Architect scalable SystemVerilog and UVM verification environments with constrained-random stimulus generation, protocol checkers, and automated scoreboards.
• Establish bit-accurate reference models using C/C++ integrated via DPI-C to verify complex pixel-processing algorithms and video pipelines dynamically.
• Formulate metric-motivated verification methodologies, tracking functional coverage, code coverage (e.g., line, branch, toggle, expression), and assertion density.
• Verify high-speed protocol interfaces and link layers against industry standards, including packetization, link training, error management, and recovery mechanisms.

Skills

Low-latency display experience

UVM testbench to emulation

Python/Perl/Makefile scripting

Education

Bachelor's degree in Electrical Engineering or Computer Engineering

Master's degree in Electrical Engineering or Computer Engineering

Tools

MicroLED

MicroOLED

Palladium

Zebu

Veloce

Job description

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X In most instances, this position requires in-person interviews as part of the hiring process.

• Bachelor's degree in Electrical Engineering, Computer Engineering, or equivalent practical experience.
  
• Experience with ultra-low latency, high-density micro-display technologies.
• Experience transitioning UVM testbenches to hardware emulation platforms.
• Experience with scripting languages such as Python or Perl or Makefile.

Preferred qualifications:

• Master's degree in Electrical Engineering, Computer Engineering, or equivalent practical experience.
• Experience with tools such as MicroLED, Micro-Organic Light Emitting Diode (OLED) for Augmented Reality/Virtual Reality/Extended Reality. (AR/VR XR) systems.
• Expertise with Palladium, Zebu and Veloce.

About the job

Be part of a team that pushes boundaries, developing custom silicon solutions that power the future of Google's direct-to-consumer products. You'll contribute to the innovation behind products loved by millions worldwide. Your expertise will shape the next generation of hardware experiences, delivering unparalleled performance, efficiency, and integration. Google's mission is to organize the world's information and make it universally accessible and useful. Our team combines the best of Google AI, Software, and Hardware to create radically helpful experiences. We research, design, and develop new technologies and hardware to make computing faster, seamless, and more powerful. We aim to make people's lives better through technology.

Responsibilities

• Define comprehensive verification strategies, test architectures, and detailed test plans covering full chip, subsystem, and block levels.
• Architect scalable SystemVerilog and Universal Verification Methodology (UVM) verification environments with constrained-random stimulus generation, protocol checkers, and automated scoreboards.
• Establish bit-accurate reference models using C/C++ integrated via Direct Programming Interface (DPI)-C to verify complex pixel-processing algorithms and video pipelines dynamically.
• Formulate metric-motivated verification methodologies, tracking functional coverage, code coverage (e.g., line, branch, toggle, expression), and assertion density.
• Verify high-speed protocol interfaces and link layers against industry standards, including packetization, link training, error management, and recovery mechanisms.

Google is proud to be an equal opportunity and affirmative action employer. We are committed to building a workforce that is representative of the users we serve, creating a culture of belonging, and providing an equal employment opportunity regardless of race, creed, color, religion, gender, sexual orientation, gender identity/expression, national origin, disability, age, genetic information, veteran status, marital status, pregnancy or related condition (including breastfeeding), expecting or parents-to-be, criminal histories consistent with legal requirements, or any other basis protected by law. See also Google's EEO Policy , Know your rights: workplace discrimination is illegal , Belonging at Google , and How we hire .

Google is a global company and, in order to facilitate efficient collaboration and communication globally, English proficiency is a requirement for all roles unless stated otherwise in the job posting.

Equity is granted exclusively and discretionarily by Alphabet Inc. on the basis of an agreement concluded between you and Alphabet Inc. Alphabet Inc. is your sole contractual partner with respect to equity grants. GSU grants are not guaranteed, are discretionary, are subject to approval by the Alphabet Inc. board of directors or its delegate, the terms of the relevant Alphabet Inc. stock plan, and your grant agreement. They have no impact on statutory payments. Current or past grants do not confer an acquired right.