Senior Circuit Silicon Correlation DFT Engineer

NVIDIA Gruppe; Bengaluru; On-site; INR 3,500,000 - 6,000,000; Full time

Job summary

NVIDIA is seeking an experienced hardware verification professional in Bengaluru, India to lead DFT and ATPG efforts across deep submicron processor designs. You will work within a multidisciplinary team to characterize silicon, validate pre-silicon models, and generate ATPG patterns for speed-path debugging.

The role requires 8+ years in Electrical/Electronics, strong DFT knowledge (scan, BIST, fault models) and hands-on RTL/gate level simulation experience.

Qualifications

• 8+ years experience in Electrical/Electronics engineering with DFT/ATPG background.
• Strong understanding of DFT including scan, BIST, on-chip scan compression and fault models.
• Experience in RTL/gate level simulation and debugging test patterns.
• RAM architecture knowledge and correlation to silicon failures.
• Proficiency with VLSI verification tools such as VCS and Tessent.
• Proficient in Python/Perl/Tcl for automation and test pattern generation.

Responsibilities

• Participate in ground breaking Processor design and debug in deep submicron technologies.
• Work in a multi functional team focused on Silicon characterization and pre-silicon performance models.
• Generate ATPG patterns for Silicon speed path debug.
• RTL and gate level verification for ATPG and non-ATPG patterns.
• Correlate diagnosis results to map to real design failures; root cause and feed learnings to pre-silicon sign-off.
• RAM correlation by studying RAM failure mechanisms and limits on silicon; improve RAM testing methods.
• Develop new methodologies using DFT infrastructure to analyze mis-correlation around RAM.
• Utilize stake patterns, scripts and tools to automate validation workflows.

Skills

DFT expertise

ATPG

RTL/gate level simulation

RAM testing and correlation

Scripting (Python, Perl, Tcl)

Automation methods/algorithms

Root cause analysis

VLSI debugging

Education

MS in Electrical/Electronics

BSEE

Tools

Tessent

VCS

RTL simulators

RAM test tools

Automation scripting

Job description

NVIDIA has continuously reinvented itself over two decades. Our invention of the GPU in 1999 sparked the growth of the PC gaming market, redefined modern computer graphics, and revolutionized parallel computing. NVIDIA is a “learning machine” that constantly evolves by adapting to new opportunities that are hard to solve, that only we can tackle, and that matter to the world. This is our life’s work , to amplify human imagination and intelligence. Make the choice to join us today.

What will you be doing:

• Participate in ground breaking Processor design and debug in deep submicron technologies.
• Work in a multi functional team passionate about Silicon characterization and correlation to pre-Silicon Performance and Power models.
• Responsible for generating ATPG patterns for Silicon speed path debug.
• RTL and gate level verification for ATPG, non-ATPG patterns.
• Correlating diagnosis result to map to real design failures. Root cause the same feed learnings to pre-silicon design sign off parameters.
• RAM correlation by studying RAM circuit failure mechanisms and understanding their limits on silicon
• Bring in more circuit understanding into the RAM testing methods across RAM types, chips and processes and improve correlation in the long run
• Develop new methodologies using DFT infrastructure to analyze components of mis-correlation in logic and in/around RAM.

What we need to see:

• BSEE required/MS preferred in Electrical or Electronics Engineering with 8+ years experience; Prior leadership experience a certain plus.
• Good understanding of Design-for-test(DFT) and logic design is required.
• Must possess a solid understanding of DFT including scan, BIST, on-chip scan compression, fault models, ATPG, and fault simulation.
• Must have some experience in bringing up RTL/gate level simulation, writing testcase and debugging it.
• Basics of circuits and RAM functionality/architecture will be helpful.
• Experience in VLSI simulation tools like VCS etc
• Experience with pattern generation using tools such as tessent.
• Proficiency in scripting language, such as, Python, Perl, Tcl, Make and automation methods/algorithms would be good.
• Prior experience in STA and basic understanding of circuit concepts will help in the role.
• Post-Silicon data gathering experience is a plus.

NVIDIA is widely considered to be one of the technology world’s most desirable employers. We have some of the most forward-thinking and talented people in the world working for us. If you\'re creative, autonomous and love a challenge, we want to hear from you.

#LI-Hybrid