Senior Analog Layout Engineer

MosChip®

Hyderabad

On-site

INR 1,800,000 - 2,400,000

Full time

14 days+

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Job summary

MosChip® is seeking an experienced analog/layout engineer to lead a small team and serve as the primary contact for customers. You will oversee design, verification, and PDK maintenance with emphasis on PLL/DLL/LNA/VGA layouts and RF blocks.

The role requires strong fundamentals in analog design, process tech, and collaboration across disciplines. Prior experience with Cadence Virtuoso tools and SKILL scripting is essential.

Qualifications

  • Lead a team of 3–4 custom layout engineers on analog layout and PV while maintaining PDKs.
  • Expertise in custom layout standard cells, I/O or analog designs such as RF transceivers, LNA, VGA, PLL, DLL, LDO.
  • Experience in Pcell development and PDK maintenance and modification.
  • Proficiency with layout tools (Virtuoso, Virtuoso-XL) and SKILL scripting.

Responsibilities

  • Mentor layout engineers and act as focal point with customers.
  • Interface with multiple teams and prioritize work per project needs.
  • Document plans clearly and maintain design documentation.

Skills

Customer focal point / leadership
Analog layout design
Physical verification
PDK maintenance & development
Team mentoring
Interfacing with customers

Education

BE/B.Tech
ME/M.Tech

Tools

Virtuoso
Virtuoso-XL
Calibre
Hercules
Assura
SKILL Programming Language

Job description

BE/B.Tech /ME/M.Tech 4 years to 10 years

  • He/She should be able to act as focal point with customers, work and lead a team of 3-4 custom layout engineers on analog layout, physical verification, maintaining PDKs, ealuating them. The candidates should have a strong expertise in some critical layouts such as PLL, DLL, LNA, VGA, ADC, LDO. He/She should be able to adapt to new technologies/tools/flows pretty quickly.
  • Expertise in Custom Layout Standard Cells, I/O or special analog designs such as RF transceivers, LNA, VGA, PLL, DLL, LDO, Bandgap, VCO, ADC,DAC.
  • Strong Layout Design Concepts.
  • Experience in Pcell development, maintaining and modifying PDKs.
  • Experience in Layout Design tools such as Virtuoso, Virtuoso-XL.
  • Expertise in SKILL Programming Language.
  • Experience in Physical verification.
  • Exposure to Calibre, Hercules and Assura.
  • Should be able to mentor layout engineers and act as focal point with customers.
  • Good understanding of Analog Design.
  • Strong basics in process technology, fabrication techniques.
  • Good written and oral communication skills. Ability to clearly document plans.
  • Ability to interface with different teams and prioritize work based on project needs.
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