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We are actively looking to hire Senior Analog Layout Design Engineers / Leads with TSMC 5nm preferred and 7–15 years of experience to join our growing team.
Notice Period: 30 days or less preferred.
Job Description:
We’re seeking highly skilled professionals with a strong background in lower FINFET technology nodes (TSMC 5nm preferred) to contribute to cutting-edge analog layout design.
If this opportunity interests you—or if you know someone suitable—please send your updated resume to: maruthiprasad.e@eximietas.design.
Referrals are highly appreciated.
We look forward to connecting with talented engineers passionate about pushing the boundaries of analog layout design!