Senior Analog Circuit Design Engineer

Univision Technology Solutions Pvt Ltd (UTS) ); Bengaluru; On-site; INR 3,500,000 - 6,000,000; Full time

Benefits offered by this job

Collaborative culture with industry-vs

Equity options

Competitive compensation

Job summary

Univision Technology Solutions Pvt Ltd (UTS) is seeking an experienced Senior Analog IC Design Engineer in Bengaluru to lead architecture, design, and silicon validation of high-performance analog and mixed-signal blocks. The role focuses on readout circuits for advanced sensor platforms with emphasis on low-noise signal conditioning and energy-efficient operation.

The ideal candidate will own the full design lifecycle, collaborate with physical design, and drive silicon bring-up and testing

Qualifications

• Bachelor’s, Master’s, or Ph.D. in Electrical Engineering, Microelectronics, VLSI Design, or a related field with 12–15 years of experience.
• Proven experience in low-noise amplifier (LNA) design and noise optimization techniques.
• Direct experience designing ADCs, with a focus on column-parallel architectures for readout circuits.
• Demonstrated track record of ultra-low-power analog circuit design in deep sub-micron CMOS processes.
• Hands-on proficiency with Cadence tools for circuit design and verification.

Responsibilities

• Own the end-to-end design lifecycle for ultra-low-power analog IC blocks (specification to tape-out).
• Design high-precision LNAs, PGAs, and bandgap references for low-amplitude sensor signals.
• Architect and implement ADCs (column-parallel, SAR, or Sigma-Delta topologies) for sensor readout.
• Implement power-optimization techniques such as subthreshold operation, duty-cycling, and power gating.
• Collaborate with physical design on analog layout, matching, shielding, and parasitic extraction.
• Support silicon bring-up, characterization, and debugging with high-precision test equipment.

Skills

LNA design

Noise optimization

Colum n-parallel ADC architectures

Ultra-low-power design

Silicon validation

Silicon characterization

Education

Bachelor's, Master's, or Ph.D. in Electrical Engineering / Microelectronics / VLSI Design

Tools

Cadence tools (Spectre, Virtuoso)

Calibre

Monte Carlo analysis

Job description

Job Title: Senior Analog Circuit Design Engineer

Experience: 5+ Years

Employment Type: Full-time

Role Overview:

We are seeking an experienced Analog IC Design Engineer to join our design team. In this role, you will lead the architecture, design, and silicon validation of high-performance analog and mixed-signal blocks. You will be instrumental in building readout circuits for advanced sensor platforms, emphasizing low-noise signal conditioning, high-density data conversion, and ultra-low-power operation.

Key Responsibilities:

• Circuit Architecture & Design: Own the end-to-end design lifecycle (from specification to tape-out) for ultra-low-power Analog IC blocks.
• Low-Noise Frontend: Design high-precision Low-Noise Amplifiers (LNAs), programmable gain amplifiers (PGAs), and bandgap references tailored for low-amplitude sensor signal extraction.
• Data Converters: Architect and implement high-efficiency ADCs, specifically focusing on column-parallel ADCs for sensor readout architectures, SAR ADCs, or Sigma-Delta topologies.
• Power Optimization: Implement cutting-edge, ultra-low-power circuit strategies (subthreshold design, duty-cycling, power gating) to maximize energy efficiency for edge-sensing applications.
• Silicon Implementation & Layout: Collaborate closely with physical design engineers on analog layout, matching, shield strategy, parasitic extraction, and floorplanning to mitigate noise and crosstalk.
• Silicon Validation: Support silicon bring-up, characterization, and debugging in the lab using high-precision test equipment.

Qualifications & Requirements

Bachelor’s, Master’s, or Ph.D. in Electrical Engineering, Microelectronics, VLSI Design, or a related field and 12-15 years of experience

Core Expertise:

• Proven experience in Low-Noise Amplifier (LNA) design and noise optimization techniques (flicker noise reduction, thermal noise budget management).
• Direct experience designing ADCs, with strong preference for column-parallel ADC architectures used in array/imaging/sensing readout circuits.
• Demonstrated track record of ultra-low-power analog circuit design in deep sub-micron CMOS process nodes.
• EDA Tools: Hands-on proficiency with industry-standard cadence tools (Spectre, Virtuoso, Calibre, Monte Carlo analysis).
• Silicon Success: Preferred background of successfully taped-out ICs with verified laboratory silicon characterization.

What We Offer

• Collaborative culture working alongside industry veterans in image sensors and system architecture.
• Opportunity to build high-impact, semiconductor technology for critical global applications.
• Competitive compensation package including equity options.