Staff Analog IC Engineer

Sierra Wireless; Hyderabad; On-site; INR 900,000 - 1,500,000; Full time

Job summary

Sierra Wireless is seeking an experienced Analog IC Design Engineer in Hyderabad to lead high-precision mixed-signal IC development. You will own critical subsystems, drive design excellence, and collaborate across Marketing, Test, Verification, Reliability and Product Engineering to deliver robust products on schedule.

The role demands deep CMOS/BiCMOS expertise, strong mixed-signal capabilities, and proficiency with Cadence tools and Verilog-AMS/SystemVerilog for modelling and verification.

Qualifications

• Bachelor’s degree in electrical/electronics engineering with 6+ years in analog IC design.
• Deep understanding of CMOS/BiCMOS analog circuits.
• Proven technical lead on chip development projects.
• Strong mixed-signal design experience.
• Expert Cadence tools usage for design, simulation and verification.
• Device modelling with Verilog-AMS and SystemVerilog.
• DFM, reliability and yield optimization knowledge.
• Parasitics, matching, ESD, latch-up, crosstalk and IR drop understanding.
• Chip top-level verification and production experience a plus.
• Documentation of design and DFMEA results.
• Translating MEMS models into equivalent circuits.
• Analog block and full chip schematic design, post-layout verification.
• LVS/DRC/PEX verification experience.
• Fluent English in writing and speaking.

Responsibilities

• Support the design and development of high-accuracy analog and mixed-signal ICs, delivering robust, high-quality designs that meet defined specifications and timelines.
• Take ownership of critical chip subsystems and act as domain expert.
• Collaborate with Marketing, Product Definition, Test, Verification, Reliability, and Product Engineering teams to ensure successful product development.
• Drive innovation in circuit design and architecture, introducing new ideas to improve performance and efficiency.
• Communicate complex technical concepts clearly through reports and presentations to senior stakeholders.

Skills

Technical leadership

Analog IC design

Mixed-signal design

CMOS/BiCMOS

Cadence tools

Verilog-AMS

SystemVerilog

DFM and yield

Parasitics/ESD

LVS/DRC/PEX

Documentation

Education

Bachelor’s degree in electrical/electronics engineering

MSc or PhD in a relevant field

Tools

Cadence design environment

Verilog-AMS

SystemVerilog

Post-layout simulation

Job description

Responsibilities:

• Support the design and development of high-accuracy analog and mixed-signal ICs, delivering robust, high-quality designs that meet defined specifications and timelines (55%).

• Take ownership of critical chip subsystems and act as domain expert (20%).

• Collaborate closely with Marketing, Product Definition, Test, Verification, Reliability, and Product Engineering teams to ensure successful product development (10%).

• Drive innovation in circuit design and architecture, introducing new ideas and solutions to improve performance and efficiency (5%).

• Communicate complex technical concepts clearly through reports and presentations to senior stakeholders (10%).

Minimum Qualifications:

• Bachelor’s degree in electrical, electronics, or related Engineering field with 6+ years’ experience in analog IC design within the semiconductor industry.

• Deep understanding of CMOS/BiCMOS analog circuit design practices.

• Proven experience as a technical lead on chip development projects.

• Strong mixed-signal design experience.

• Expert proficiency with Cadence design environment, simulation, and verification tools.

• Expert proficiency with device modelling (Verilog-AMS, SystemVerilog) and mixed-signal simulation.

• Understanding of design for manufacturability (DFM), reliability, and yield optimization.

• Solid understanding of mixed-signal design, including parasitic, matching, ESD, latch up, crosstalk, and IR drop.

• Experience in chip top level verification and production experience is a plus

• Documentation of design results, characterization results and DFMEA

• Experience in translating MEMS models into equivalent circuits

• Demonstrated innovation and creative problem-solving capabilities.

• Analog block and full chip level schematic design, process corner analysis, and post-layout simulation

• Block level verification including LVS/DRC/PEX

• Fluent in written and spoken English

Desired Qualifications

• Postgraduate qualification (MSc or PhD) in a relevant field.

• Experience with circuit design in mixed-signal design.

• Experience with mixed-signal lab validation techniques and equipment.

• Experience in translating haptic actuators model into equivalent circuits is a plus

• Familiarity with high voltage and high current ASIC design.