Rtl Design Engineer

Dignifyd Io; Hyderabad; On-site; INR 600,000 - 900,000; Full time

Job summary

Dignifyd Tech is seeking an RTL Design Engineer in Hyderabad, India to contribute to Ethernet IP design and silicon development. The role focuses on RTL design and development for Ethernet MAC/PHY interfaces and related networking protocol blocks, within a dedicated engineering team.

The ideal candidate has hands-on RTL experience and will join a networking silicon team to deliver high-quality RTL blocks and integration points for production-ready platforms.

Qualifications

• UG: Any Graduate requirements

Responsibilities

• RTL design and development for Ethernet MAC/PHY interfaces and related networking protocol blocks.
• Work as part of the networking silicon team to deliver robust RTL blocks and integration points.

Education

UG: Any Graduate

Job description

Posted: 1 week ago Openings: 1 Applicants: 50+

RTL Design Engineers with specific, hands-on experience in Ethernet IP design to join our networking silicon team. This role focuses on RTL design and development for Ethernet MAC/PHY interfaces and related networking protocol blocks.

Role Category: Engineering & Manufacturing

Education

UG: Any Graduate

Key Skills

Skills highlighted with ‘‘ are preferred keyskills

Dignifyd Tech designs, builds and scales digital products. From a fresh idea to a production-ready platform — we are the engineering team behind your next big launch.

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