RISC-V System IP Design Lead

QUALCOMM, Inc.; Chennai District; In loco; INR 3.500.000 - 5.500.000; Tempo pieno

Descrizione del lavoro

Qualcomm India Private Limited in Chennai seeks a senior Systems Engineer with 8+ years in IP/SoC design, micro-architecture, and RTL coding. You will contribute to CPU architecture, coherency, virtualization, and interconnect protocols.

The role requires hands-on experience with synthesis, verification, DFT, formal methods, and silicon debugging, plus ownership of front-end milestones. Strong communication and leadership skills are essential as you guide cross-functional teams through design,

Competenze

• 8+ years of experience in IP/SoC design and micro-architecture.
• Experience with RISC-V or ARM ISA.
• Knowledge of interconnect protocols and NoC concepts.
• Strong RTL development and Verilog coding experience.
• Synthesis, verification, DFT, and silicon debug proficiency.

Mansioni

• Drive front-end design tasks and plan dependencies across teams.
• Coordinate milestones across design, verification, and physical implementation.
• Manage SoC dependencies and track front-end progress.
• Demonstrate effective communication and leadership in project reviews.

Conoscenze

IP/SoC design

ISA knowledge (RISC-V/ARM)

Interconnect protocols (CHI/AHB/AXI)

Digital design & RTL

Verilog RTL coding

CPU architecture & virtualization

Synthesis/DFT/verification

Lint/CDC/PLDRC/CLP

design convergence cycle

SoC dependency management

Project milestones leadership

Effective communication

Formazione

Bachelor’s degree in Engineering/CS/IS

Master’s degree in Engineering/CS/IS

PhD in Engineering/CS/IS

Strumenti

Synopsys Design Compiler

Descrizione del lavoro

Company

Qualcomm India Private Limited

Job Area

Engineering Group, Engineering Group > Systems Engineering

General Summary

• 8+ years of solid experience in IP/SoC design and micro-architecture
• RISC-V ISA or ARM ISA knowledge
• Understanding of interconnect protocols like CHI/AHB/AXI/ACE/ACE-Lite/NoC concepts
• Good knowledge of Digital Design and RTL development
• Hands-on experience with SoC Design, Verilog RTL coding
• Understanding of CPU architecture, coherency protocols and virtualization.
• Working knowledge of Synthesis, DC/DCG synthesis with Synopsys design complier, DFT, verification, formal verification, silicon debug
• Working knowledge of Lint, CDC, PLDRC, CLP etc
• Good understanding of the design convergence cycle in terms of architecture, micro-architecture, synthesis, timing closure and verification
• Manage SoC dependencies, planning and tracking of all front-end design related tasks
• Driving project milestones across the design, verification and physical implementations
• Should possess effective communication and leadership skills

Minimum Qualifications

• Bachelor's degree in Engineering, Information Systems, Computer Science, or related field and 4+ years of Systems Engineering or related work experience.
• Master's degree in Engineering, Information Systems, Computer Science, or related field and 3+ years of Systems Engineering or related work experience.
• PhD in Engineering, Information Systems, Computer Science, or related field and 2+ years of Systems Engineering or related work experience.

Minimum Qualifications

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 6+ years of Hardware Engineering or related work experience.
• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 5+ year of Hardware Engineering or related work experience.
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

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