IP/SoC Design - Sr Engineer/Lead

Qualcomm; Chennai District; On-site; INR 1,500,000 - 2,800,000; Full time

Job summary

Qualcomm India Private Limited in Chennai seeks an experienced hardware engineer for IP/SoC design and micro-architecture. You will work on interconnect protocols, ARM multicore architectures and RTL development, with hands-on synthesis, verification, and silicon debugging.

Strong communication and leadership are required for milestone-driven collaboration. The role emphasizes design convergence, front-end task management, and cross-functional coordination across design and verification teams.

Qualifications

• 2 to 8+ years of solid experience in IP/SoC design and micro-architecture.
• Understanding of interconnect protocols like CHI/AHB/AXI/ACE/ACE-Lite/NoC concepts.
• Good knowledge of Digital Design and RTL development.
• Hands‑on experience with SoC Design, Verilog RTL coding.
• Understanding of multi‑core ARMv8/v9 CPU architecture, coherency protocols and virtualization.
• Working knowledge of Synthesis, DC/DCG synthesis with Synopsys design compiler, DFT, verification, formal verification, silicon debug.
• Working knowledge of Lint, CDC, PLDRC, CLP etc
• Good understanding of the design convergence cycle in terms of architecture, micro‑architecture, synthesis, timing closure and verification
• Manage SoC dependencies, planning and tracking of all front‑end design related tasks
• Driving project milestones across the design, verification and physical implementations
• Should possess effective communication and leadership skills

Skills

Interconnect protocols CHI/AHB/AXI/ACE

Digital design and RTL

SoC design and Verilog RTL

ARMv8/v9 multicore architecture

Synthesis and DFT/verification

Silicon debugging

Lint and CDC checks

Design convergence and timing closure

Communication and leadership

Education

Bachelor's degree in CS/EE/Engineering, 2+ years hardware

Master's degree in CS/EE/Engineering, 1+ year hardware

PhD in CS/Engineering or related field

Tools

Synopsys Design Compiler

Job description

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

Minimum Qualifications (Experience):

• 2 to 8+ years of solid experience in IP/SoC design and micro-architecture
• Understanding of interconnect protocols like CHI/AHB/AXI/ACE/ACE-Lite/NoC concepts
• Good knowledge of Digital Design and RTL development
• Hands‑on experience with SoC Design, Verilog RTL coding
• Understanding of multi‑core ARMv8/v9 CPU architecture, coherency protocols and virtualization.
• Working knowledge of Synthesis, DC/DCG synthesis with Synopsys design complier, DFT, verification, formal verification, silicon debug
• Working knowledge of Lint, CDC, PLDRC, CLP etc
• Good understanding of the design convergence cycle in terms of architecture, micro‑architecture, synthesis, timing closure and verification
• Manage SoC dependencies, planning and tracking of all front‑end design related tasks
• Driving project milestones across the design, verification and physical implementations
• Should possess effective communication and leadership skills

Minimum Qualifications (Education):

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field.

Minimum requirement is Bachelor of Engineering.

Preferred is Masters of Engineering in Computer Science or Computer Engineering. PhD in Computer Science, Engineering, Information Systems, or related field.

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