SOC Design - Sr Lead Bangalore, India Hardware Engineering Posted 14 hours ago

Qualcomm; Bengaluru; On-site; INR 1,200,000 - 2,200,000; Full time

Job summary

Qualcomm India Private Limited in Bengaluru is inviting an experienced ASIC/SoC Design engineer to join our Engineering Group. You will contribute to logic design, RTL coding (Verilog/SystemVerilog), AMBA protocols, memory controller designs, and multi-clock, low-power SoC integration across complex silicon.

You will collaborate with verification and validation teams for pre/post silicon debug, and work with floorplanning to ensure optimal chip layout.

Qualifications

• 8 to 11 years of ASIC/SoC Design experience.
• Experience in Logic design /micro-architecture / RTL coding is a must.
• Must have hands on experience with SoC design and integration for complex SoCs.
• Experience in Verilog/System-Verilog is a must.

Responsibilities

• Work closely with the SoC verification and validation teams for pre/post Silicon debug.
• Hands on experience in Low power SoC design is required.
• Hands on experience in Multi Clock designs, Asynchronous interface is a must.
• Experience using ASIC development tools like Lint, CDC, Design Compiler and PrimeTime.

Skills

ASIC/SoC Design

Logic design

RTL coding

Verilog/System-Verilog

AMBA protocols

SoC integration

Low power SoC design

Multi Clock designs

Timing closure

Synthesis tools

Floorplanning

Communication skills

Education

Bachelor's degree in Electrical Engineering

Master's degree in Electrical Engineering

PhD in Electrical Engineering

Tools

Lint

CDC

Design Compiler

PrimeTime

Job description

Company:

Qualcomm India Private Limited

Job Area:

Engineering Group, Engineering Group > Hardware Engineering

General Summary:

• 8 to 11 years of work experience in ASIC/SoC Design
• Experience in Logic design /micro-architecture / RTL coding is a must.
• Must have hands on experience with SoC design and integration for complex SoCs.
• Experience in Verilog/System-Verilog is a must.
• knowledge of AMBA protocols - AXI, AHB, APB, SoC clocking/reset/debug architecture and peripherals like USB, PCIE and SDCC.
• Understanding of Memory controller designs and microprocessors is an added advantage
• Work closely with the SoC verification and validation teams for pre/post Silicon debug
• Hands on experience in Low power SoC design is required
• Hands on experience in Multi Clock designs, Asynchronous interface is a must.
• Experience in using the tools in ASIC development such as Lint, CDC, Design compiler and Primetime is required.
• Understanding of constraint development and timing closure is a plus.
• Experience in Synthesis / Understanding of timing concepts is a plus.
• Experience creating padring and working with the chip level floorplan team is an added advantage.
• Excellent oral and written communications skills
• Proactive, creative, curious, motivated to learn and contribute with good collaboration skills.

Required: Bachelor's, Electrical Engineering Preferred: Master's, Electrical Engineering.

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 1+ year of Hardware Engineering or related work experience.

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