RISCV Infra System IP Design-Sr / Lead / Staff Engineer

QUALCOMM, Inc.; Chennai District; Presencial; INR 3 200 000 - 5 200 000; Tempo integral

Resumo da oferta

Qualcomm, Inc. in Chennai, India is seeking an experienced hardware/SoC RTL designer. You will contribute to IP and subsystem RTL design, architecture planning, and cross‑functional collaboration across design and verification teams.

The role requires strong Verilog skills, knowledge of ARMv8/v9, memory management concepts, and proficiency with synthesis, DFT, and silicon debug while driving milestones in a global environment.

Qualificações

• Bachelor's degree in Electronics or related field with 2+ years hardware experience OR
• Master's degree in VLSI/Micro Electronics with 1+ year hardware experience OR
• PhD in Electronics Engineering with relevant hardware exposure
• Additional CS/EE degrees with 4+ years hardware experience

Responsabilidades

• Drive milestones across design, verification and physical implementation
• Coordinate front-end design tasks and manage SoC dependencies
• Collaborate with global design teams and ensure architecture conformance

Conhecimentos

IP/Sub System/SoC RTL design

Verilog RTL development

ARM/RISCV system architecture

bus protocols CHI/AHB/AXI

Memory Management/VM concepts

Multi-core ARMv8/v9 & virtualization

DFT/verification/silicon debug

Synthesis & timing closure

Automation scripting (Python/Perl)

Formação académica

Bachelor's degree in Electronics Engineering

Master's degree in VLSI / Micro Electronics

PhD in Electronics Engineering

Bachelor's degree in Computer Science / Electrical/Electronics Engineering

Master's degree in Computer Science / Electrical/Electronics Engineering

PhD in Computer Science / Engineering

Ferramentas

Python

Perl

Descrição da oferta de emprego

Company:

Job Area:

General Summary:

• 3 to 15 years of solid experience in IP/Sub System/SoC RTL design and micro-architecture
• Understanding of bus protocols like CHI/AHB/AXI/ACE/ACE-Lite and Interconnect concepts
• Good knowledge of Verilog RTL development and VLSI Digital Design flows
• Knowledgeable on ARM / RISCV system architecture, Memory Management, Virtual Memory concepts, Core sight architecture, power management fundamentals
• Understanding of multi-core ARMv8/v9 CPU architecture, coherency protocols and virtualization
• Working knowledge of Lint, CDC, PLDRC, CLP, Synthesis, DFT, verification, formal verification, silicon debug
• Good understanding of the design convergence cycle in terms of architecture, micro-architecture, synthesis, timing closure and verification
• Manage SoC dependencies, planning and tracking of all front-end design related tasks
• Driving project milestones across the design, verification and physical implementations
• Communication and collaboration skills to work with a large world-wide design organization
• Proficiency in Gen AI skills, Scripting languages (Python or Perl) for Automation initiatives is desirable

Minimum Qualifications:

• Bachelor's degree in Electronics Engineering, or related field and 2+ years of Hardware Engineering or related work experience
• OR
• Master's degree in VLSI / Micro Electronics or related field and 1+ year of Hardware Engineering or related work experience.
• OR
• PhD in Electronics Engineering or related field

Minimum Qualifications:

• Bachelor's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 4+ years of Hardware Engineering or related work experience.
• OR
• Master's degree in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 3+ years of Hardware Engineering or related work experience.
• OR
• PhD in Computer Science, Electrical/Electronics Engineering, Engineering, or related field and 2+ years of Hardware Engineering or related work experience.

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