Principal Verification Engineer (Hyderabad)

Mulya Technologies; Bengaluru; On-site; INR 1,500,000 - 2,000,000; Full time

Job summary

A leading technology company in Bengaluru is seeking a Principal Verification Engineer with over 12 years of experience in functional verification. The ideal candidate will have strong expertise in VLSI verification and AI model deployment for multimedia applications. Responsibilities include developing AI models, creating verification testbenches using SystemVerilog/UVM, and leading verification activities for complex SoCs/IPs. This position is full-time and requires strong leadership and collaboration skills.

Qualifications

• 12+ years in functional verification with 5+ years in the Multimedia domain.
• Experience in developing and optimizing AI models for multimedia applications.
• Strong understanding of automation flows and collaboration during the development cycle.

Responsibilities

• Develop and deploy AI models for audio and video applications.
• Create and maintain SystemVerilog/UVM testbenches and methodologies.
• Implement automation to improve verification efficiency.

Skills

Functional Verification

VLSI Verification

AI model deployment for Audio/Video

SystemVerilog/UVM

DSP/Codecs understanding

Leadership

Automation and Debugging

Tools

SystemVerilog

UVM

Job description

Overview

Principal Verification Engineer (Hyderabad) with 12+ years in Functional Verification; strong expertise in VLSI verification, multimedia, and AI model deployment for Audio/Video applications. Lead verification efforts for complex SoCs/IPs and collaborate with cross-functional teams on multimedia and AI-driven system use cases.

Responsibilities

• AI & Multimedia (AV) responsibilities: Develop, optimize, and deploy AI models for audio and video applications with a focus on inference efficiency across NPUs, GPUs, and CPUs. Evaluate model performance, quantization, compression, and robustness. Collaborate with R&D, systems, and integration teams for system use case verification and commercialization support. Lead verification activities for IP/SoC during ASIC design, including RTL and gate-level simulations; drive verification closure.
• System verification: Develop and maintain SystemVerilog/UVM testbenches, UVCs, sequences, checkers, and coverage models; ensure functional, performance, and power correctness. Create and maintain test plans, verification methodologies, and documentation.
• Automation and debugging: Implement automation flows to improve verification efficiency; participate in debug activities across the development cycle; collaborate with software and hardware teams on architectural strategies.
• RD collaboration: Work with design teams to define verification requirements; evaluate complete design flows from RTL to timing and power usage.

Qualifications

• Experience: 12+ years in functional verification; minimum 5+ years in Multimedia (Display, Camera, Video, Graphics) domain.
• Domain Expertise: Display (Pixel processing, composition, compression, MIPI DSI, DisplayPort, HDMI); Bus/Interconnect (AHB, AXI); multimedia technologies (Audio/Video codecs, Image Processing, SoC use cases).
• DSP/Codecs: Good understanding of DSP, codecs (audio/video), and real-time streaming pipelines.
• AI Accelerators: Architecture understanding, verification, and deployment experience across NPUs, GPUs, and custom AI engines.
• SoC verification: System-level verification with embedded RISC/DSP processors; strong exposure to MIPI DSI-2, CSI-2, MIPI D-PHY, C-PHY.
• Verification Skills: SystemVerilog/UVM testbenches, UVCs, sequences, checkers; coverage models; OOP concepts; HVL: SystemVerilog (UVM), SystemC (preferred).
• Leadership: Mentor and guide junior verification engineers; drive closure for IP and SoC-level deliverables; strong written and verbal communication; ability to plan, prioritize, and execute.
• AI/ML: Experience with AI models (e.g., CNN) and statistical modeling; exposure to audio frameworks and embedded platforms; hands-on in multimedia use cases verification and system-level scenarios.

Desired Seniority & Employment

• Seniority level: Mid-Senior level
• Employment type: Full-time
• Job function: Design, Research, and Engineering
• Industries: Semiconductor Manufacturing, Computer Hardware Manufacturing, Telecommunications

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