SoC Verification Engineer

Ananant Systems Private Limited; Bengaluru; On-site; INR 4,000,000 - 8,000,000; Full time

Benefits offered by this job

ESOPs

Job summary

Ananant Systems in Bengaluru seeks an experienced SoC Verification Engineer to own end-to-end functional verification of a proprietary AI-native DSP SoC. You will lead IP integration, SoC validation, and pre-silicon sign-off, with post-silicon support.

You should have hands-on UVM expertise, a track record of at least two commercial tapeouts, and mastery of high-speed interfaces and debugging in advanced semiconductor nodes. This role offers high ownership in a cutting-edge startup.

Qualifications

• 2+ commercial SoC tapeouts with full-chip verification exposure.
• Ownership of at least one major verification domain (IO/peripherals, power, or datapath).
• Post-silicon bring-up and debug experience preferred.

Responsibilities

• Own and develop the SoC-level verification plan, coverage model, and traceability matrix.
• Build and maintain UVM-based SoC testbench (top-level environment, virtual sequencer, chip-level scoreboard, coverage).
• Integrate and verify high-speed interfaces: PCIe Gen3/4, USB3, JESD204B, MIPI CSI-2/DSI, DDR/LPDDR, AXI/AHB/APB.
• Drive end-to-end datapath verification for workloads including 5G/6G, AI inference, video/camera, radar, and Vision AI.
• Verify critical SoC components: DMA, Interrupt Controller, Clock/Reset, Power Management (UPF), DFT (Scan, MBIST, LBIST, JTAG).
• Own regression management, coverage closure, gate-level simulation (GLS with SDF), and tapeout sign-off.
• Collaborate cross-functionally with design, architecture, and physical design teams
• Support post-silicon bring-up, validation, and debug.

Skills

UVM

Python

Perl

Shell

Tools

VCS

Xcelium

Questa

Job description

Hardware + Full Chip Verification | AI-Native DSP SoC

About the Role

Ananant Systems is building a proprietary AI-native DSP SoC targeting next-generation applications across 5G/6G wireless, Edge AI inference, Vision AI, camera, video, and radar systems.

We are looking for a highly experienced SoC Verification Engineer to own end-to-end functional verification of the full chip — from IP integration and SoC validation to pre-silicon sign-off and post-silicon bring-up support.

This role demands deep expertise in full-chip verification, complex interface integration, and system-level validation in advanced semiconductor nodes.

Key Responsibilities

• Own and develop the SoC-level verification plan, coverage model, and traceability matrix.
• Build and maintain UVM-based SoC testbench (top-level environment, virtual sequencer, chip-level scoreboard, coverage).
• Integrate and verify high-speed interfaces: PCIe Gen3/4, USB3, JESD204B, MIPI CSI-2/DSI, DDR/LPDDR, AXI/AHB/APB.
• Drive end-to-end datapath verification for workloads including 5G/6G, AI inference, video/camera, radar, and Vision AI.
• Verify critical SoC components: DMA, Interrupt Controller, Clock/Reset, Power Management (UPF), DFT (Scan, MBIST, LBIST, JTAG).
• Own regression management, coverage closure, gate-level simulation (GLS with SDF), and tapeout sign-off.
• Collaborate cross-functionally with design, architecture, and physical design teams
• Support post-silicon bring-up, validation, and debug.

Required Skills & Expertise

• UVM (SoC environment, virtual sequencer, chip-level scoreboard)
• Regression management and scripting (Python / Perl / Shell)

Advanced Level:

• DFT simulation and validation
• End-to-end datapath verification methodologies

Tools & Domain:

• Hands-on experience with VCS, Xcelium, or Questa
• Strong debugging skills using waveform analysis tools
• Solid understanding of wireless, AI, or multimedia SoCs

Mandatory Experience

• Named contributor on at least 2 commercial SoC tapeouts (16nm or below) with full-chip verification exposure
• Ownership of at least one major verification domain (e.g., IO/peripherals, power management, or datapath) through tapeout
• Experience in post-silicon bring-up and debug is highly preferred

Why Join Ananant Systems

• Work on a cutting-edge AI-native DSP SoC powering multiple high-impact domains
• High ownership and opportunity to influence next-gen semiconductor products
• Competitive compensation + ESOPs in a fast-growing deep-tech startup
• Opportunity to work on advanced FinFET technology nodes