Principal Design Engineer

Cadence Design Systems, Inc.

Pune District

On-site

INR 3,000,000 - 6,000,000

Full time

14 days+

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Job summary

Cadence Design Systems, Inc. in Pune seeks an experienced Design Verification engineer to work in the Functional Safety team for Xtensa processors. You will develop and verify hardware and software safety mechanisms, build and run test benches, and implement coverage monitoring to support product safety certification.

The role requires 8–10 years of verification experience, a BS in EE/CE, and leadership abilities, with strong Verilog/SystemVerilog, MISRA, and C/assembly skills.

Qualifications

  • 8-10 years of design verification experience
  • BS in EE/Computer Engineering
  • Experience in leading a small team
  • Excellent knowledge of computer architecture/micro-architecture and design verification fundamentals
  • Exposure to MISRA coding guidelines
  • Exposure to debugging netlist/gate level simulation
  • Proficient with C language and assembly language

Responsibilities

  • Develop and verify hardware and software safety mechanisms.
  • Implement simulation or emulation test benches and diagnostics.
  • Create and maintain assertion checkers or coverage monitors to meet safety goals.
  • Assist with fault simulation and analyze coverage information.
  • Collaborate with RTL, EDA, and Functional Safety teams to deliver safety-certified products.

Skills

Leadership
Communication
Problem solving
Debugging

Education

Bachelor's degree in EE/Computer Engineering

Tools

Verilog
SystemVerilog
EDA simulation
MISRA guidelines
C language
Assembly language
ISO 26262

Job description

PUNE


Full time


R48322


At Cadence, we hire and develop leaders and innovators who want to make an impact on the world of technology.


Cadence IP Tensilica group is a leading provider of configurable embedded processor technology, with a growing presence in the Automotive Safety market. As a member of the Functional Safety Design Verification Team for Xtensa processors you will be responsible for development and verification of hardware and software safety mechanisms. You will implement simulation or emulation test benches, assembly/C language diagnostics, assertion checkers or coverage monitors to meet target safety and product verification goals. You will also assist with fault simulation and analyzing coverage information. You will work closely with the RTL, EDA, and Functional Safety teams. You will develop and deliver functional safety work products, including documentation needed for product safety certification.


Required Skills and Experience:



  • 8-10 years of design verification experience


  • BS (or higher) in EE/Computer Engineering


  • Experience in leading a small team


  • Excellent knowledge of computer architecture/micro-architecture and design verification fundamentals


  • Expertise with Verilog and popular EDA simulation, SystemVerilog assertions and functional coverage


  • Good working knowledge of scripting languages like Perl, Unix shell or similar languages


  • Knowledge of technical safety concepts and requirement specifications according to ISO 26262


  • Proficient with C language and assembly language


  • Excellent written and oral communication skills necessary


  • Exposure to debugging netlist/gate level simulation.


  • General understanding OS.


  • Exposure to MISRA coding guidelines


  • Experience in fault simulation tools and methodologies

    We’re doing work that matters. Help us solve what others can’t.



Additional Jobs (https://cadence.wd1.myworkdayjobs.com/addl_jobs)


Equal Employment Opportunity Policy:


Cadence is committed to equal employment opportunity throughout all levels of the organization.



  • Read the policy(opens in a new tab) (https://www.cadence.com/content/dam/cadence-www/global/en_US/documents/company/careers/equal-employment-opportunity-policy.pdf)


We welcome your interest in the company and want to make sure our job site is accessible to all. If you experience difficulty using this site or to request a reasonable accommodation, please contact staffing@cadence.com.


Privacy Policy:


Job Applicant If you are a job seeker creating a profile using our careers website, please see the privacy policy(opens in a new tab) (https://www.cadence.com/en_US/home/privacy/privacy-policy.html) .


E-Verify Cadence participates in the


E-Verify program in certain U.S. locations as required by law. Download More Information on E-Verify (64K) (https://www.cadence.com/content/dam/cadence-www/global/en_US/documents/company/careers/e-verify-participation-poster.pdf)


Cadence plays a critical role in creating the technologies that modern life depends on. We are a global electronic design automation company, providing software, hardware, and intellectual property to design advanced semiconductor chips that enable our customers create revolutionary products and experiences.


Thanks to the outstanding caliber of the Cadence team and the empowering culture that we have cultivated for over 25 years, Cadence continues to be recognized by Fortune Magazine as one of the 100 Best Companies to Work For. Our shared passion for solving the world’s toughest technical challenges, our dedication to pushing the limits of the industry, and our drive to do meaningful work differentiates the people of Cadence.


Cadence is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.


Cadence is committed to creating a diverse environment and is proud to be an equal opportunity employer. All qualified applicants will receive consideration for employment without regard to race, color, sex, age, national origin, religion, sexual orientation, gender identity, status as a veteran, basis of disability, or any other protected class.

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