PMTS- RTL Design Engineer

Mulya Technologies; Bengaluru; On-site; INR 6,000,000 - 9,000,000; Full time

Job summary

Mulya Technologies in Bengaluru, India, seeks a senior RTL architect with 14+ years of experience to lead architectural decisions for next-generation ASICs and accelerators. You will collaborate across teams to drive design decisions with emphasis on performance, power, and testability.

You will develop and verify RTL in SystemVerilog, define design specifications, implement logic for testability, and provide debugging support across post-silicon activities.

Qualifications

• Minimum 14+ years of industry experience in electrical/computer engineering roles.
• Hands-on RTL design experience using SystemVerilog for CPUs/ASICs/accelerators.
• Strong understanding of ASIC design flow, verification, synthesis and timing analysis.
• Excellent interpersonal and communication skills.

Responsibilities

• Perform architectural design trade-offs for features, performance and constraints.
• Define and document design specifications for the product.
• Develop and deliver fully verified RTL to meet targets and quality gates.
• Design and implement logic to enable efficient test and debugging.
• Provide debugging support for design verification and post-silicon activities.

Skills

RTL development

SystemVerilog

ASIC design

architecture trade-offs

test and debug

communication skills

Education

Master’s degree in Electrical Engineering or Computer Engineering

Bachelor’s degree in Electrical Engineering or Computer Engineering

Job description

Founded in 2023,by Industry veterans HQ in California,US

Company Description:

We are product based startup. The products are chipsets and intelligent machines that enable scalable enterprises AI, streaming video intelligence, training trillion parameter models, and fine-tuning LLMs, allowing enterprises to improve productivity with advanced solutions. We are looking for exceptional talent and leadership to join our organization, the world’s first company developing Agentic Silicon for powering the future of AI.

We are pioneering a new era in AI innovation focused on accelerating the

adoption of end-to-end enterprise AI, from the edge to Zettascale systems.

Our cutting-edge Software and composable silicon Chiplets will transform the way AI models are Trained, Deployed, and Scaled.

"Join Our Growing Team!"

We are building a world-class team to drive innovation in AI Silicon & Software and hiring for below position in Bangalore.

Job Description:

• o Perform architectural/design trade-offs for required product features, performance and system constraints.
• o Responsible for defining and documenting design specifications.
• o Develop and deliver a fully verified RTL to achieve the design targets and quality sign-off requirements.
• o Design and Implement logic functions that enable efficient test and debug.
• o Provide Debug support for design verification and post-silicon activities.

Skill and Experience Requirements:

• o Minimum 14 + years industry experience with Master’s degree (preferred) or Bachelors degree in Electrical or Computer Engineering.
• o Hand-on experience with micro-architecture and RTL development (System Verilog) for x86/ARM CPU Processors or high-speed custom ASICs/Accelerators with focus on any one: Cache controller, IO interfaces (PCIe, CXL, Ethernet), UCIe, Memory controllers, Display, Video encoding/transcoding.
• o Good understanding of ASIC design flow including RTL design, verification, logic synthesis and timing analysis and sign-off quality flows.
• o Self-starter with strong interpersonal and communication skills .