Physical Design Trainer

Vlsi First; Hyderabad; On-site; INR 350,000 - 520,000; Full time

Job summary

Vlsi First in Hyderabad is seeking a dedicated trainer to conduct offline classroom sessions on VLSI Physical Design, covering the full design flow from Synthesis to Signoff. You will mentor students, lead practical assignments, and conduct mock interviews to boost industry readiness.

The ideal candidate has hands-on Cadence Genus and Innovus experience, strong Linux/TCL scripting skills, and excellent communication abilities. Freshers with solid PD knowledge are welcome to apply.

Qualifications

• B.Tech/M.Tech in ECE, EEE, Electronics or related disciplines.
• 3 years of experience in VLSI Physical Design, training, or relevant industry experience.
• Freshers with strong Physical Design knowledge and excellent communication skills may also be considered.

Responsibilities

• Conduct offline classroom training sessions on VLSI Physical Design.
• Train students on the complete Physical Design flow, including Synthesis, Floorplanning, Power Planning, Placement, CTS, Routing, STA, and Signoff.
• Provide hands-on training using industry-relevant EDA tools.
• Guide students through practical assignments, projects, and real-time design concepts.
• Conduct assessments, technical evaluations, and mock interviews.
• Mentor students and support them in improving their technical skills and industry readiness.
• Prepare and update training materials, assignments, and project content as required.
• Stay updated with the latest developments and methodologies in VLSI Physical Design.

Skills

VLSI Physical Design

Cadence Genus

Cadence Innovus

Linux

TCL scripting

Communication

Mentoring

Education

B.Tech/M.Tech in ECE/EEE/Electronics

Tools

Cadence Genus

Cadence Innovus

Job description

Role & responsibilities

Key Responsibilities

• Conduct offline classroom training sessions on VLSI Physical Design.
• Train students on the complete Physical Design flow, including:
• Synthesis
• Floorplanning
• Power Planning
• Placement
• Clock Tree Synthesis (CTS)
• Routing
• Static Timing Analysis (STA)
• Physical Verification and Signoff
• Provide hands-on training using industry-relevant EDA tools.
• Guide students through practical assignments, projects, and real-time design concepts.
• Conduct assessments, technical evaluations, and mock interviews.
• Mentor students and support them in improving their technical skills and industry readiness.
• Prepare and update training materials, assignments, and project content as required.
• Stay updated with the latest developments and methodologies in VLSI Physical Design.

Required Skills

• Strong understanding of the complete VLSI Physical Design flow.
• Hands-on experience with Cadence Physical Design tools, particularly Genus and Innovus.
• Knowledge of Synthesis, Floorplanning, Power Planning, Placement, CTS, Routing, STA, and Signoff.
• Good understanding of Linux and TCL scripting.
• Good communication, presentation, and mentoring skills.

Eligibility

• B.Tech/M.Tech in ECE, EEE, Electronics, or related disciplines.
• 03 years of experience in VLSI Physical Design, training, or relevant industry experience.
• Freshers with strong Physical Design knowledge and excellent communication skills may also be considered.