Physical Design Engineer

NXP Semiconductors

Pune District

On-site

INR 1,500,000 - 2,300,000

Full time

14 days+
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Job summary

NXP Semiconductors in Pune, India seeks a Physical Design Engineer (G2) to contribute to the implementation and signoff of complex SoC/IP blocks. You will handle floorplanning, CTS, routing, timing convergence, and PPA-focused signoff in advanced nodes, collaborating with RTL, DFT, packaging, and STA teams.

The role requires a Bachelors/Masters in Electronics or Microelectronics with 3–5 years of ASIC Physical Design experience, hands-on EDA tool proficiency, and scripting skills.

Qualifications

  • Bachelors or Masters in Electronics / Electrical Engineering / Microelectronics.
  • 3–5 years of ASIC Physical Design experience.
  • Strong understanding of physical design flow (FP → P&R → Signoff).
  • Familiar with STA fundamentals and CMOS digital design basics.
  • Hands-on with EDA tools: Cadence (Innovus/Genus) or Synopsys (ICC2/Fusion Compiler, PrimeTime).
  • Good scripting skills in Tcl, Python, or Shell.
  • Experience in advanced nodes (16nm and below).
  • Knowledge of low-power flows (UPF/CPF) and multi-voltage designs.
  • Familiarity with physical verification tools (Calibre).

Responsibilities

  • Execute block-level physical design from synthesized netlist to GDSII.
  • Floorplanning and power grid design.
  • Placement and optimization.
  • Clock Tree Synthesis (CTS).
  • Routing and post-route optimization.
  • Drive timing convergence across MCMM scenarios with STA teams.
  • Ensure design closure incl. setup/hold timing.
  • DRC/LVS signoff and EM/IR drop compliance.
  • Debug and resolve congestion and SI/crosstalk issues.
  • Implement functional and physical ECOs.
  • Collaborate with RTL/design, DFT, packaging and integration teams.
  • Contribute to methodology improvements and scripting.

Skills

ASIC PD experience
Scripting (Tcl/Python/Shell)
CMOS digital design basics
STA fundamentals
Advanced nodes experience (16nm and 2x
Multi-domain / multi-voltage designs

Education

Bachelor’s/Master’s degree in Electronics / Electrical Engineering / Microelectronics

Tools

Cadence Innovus
Cadence Genus
Synopsys ICC2
Fusion Compiler
PrimeTime
Calibre

Job description

Job Summary NXP Semiconductors is seeking a Physical Design Engineer (G2) with strong fundamentals in physical design implementation to join our growing VLSI team. In this role, you will contribute to the implementation and signoff of complex SoC/IP blocks in advanced technology nodes, ensuring high-quality delivery aligned with NXP’s stringent PPA (Power, Performance, Area) and reliability standards.

Key Responsibilities
  • Execute block-level physical design from synthesized netlist to GDSII
  • Floorplanning and power grid design
  • Placement and optimization
  • Clock Tree Synthesis (CTS)
  • Routing and post-route optimization
  • Drive timing convergence across MCMM scenarios in collaboration with STA teams
  • Ensure design closure including: Setup/hold timing closure
  • DRC/LVS clean signoff
  • IR drop and electromigration (EM) compliance
  • Debug and resolve: Congestion issues
  • SI/crosstalk problems
  • Functional and physical ECOs
  • Collaborate cross-functionally with: RTL/design teams to improve QoR
  • DFT teams for test readiness
  • Packaging and full-chip integration teams
  • Contribute to methodology improvements and automation through scripting
  • Follow and enforce NXP design methodologies, quality and reliability standards
Required Qualifications
  • Bachelor’s/Master’s degree in Electronics / Electrical Engineering / Microelectronics
  • 3–5 years of experience in ASIC Physical Design
  • Strong understanding of:
  • Physical design flow (FP → P&R → Signoff)
  • Static Timing Analysis fundamentals
  • CMOS digital design basics
  • Hands-on experience with industry EDA tools: Cadence (Innovus/Genus) or Synopsys (ICC2/Fusion Compiler, PrimeTime)
  • Good scripting skills in Tcl, Python, or Shell
  • Experience in advanced nodes (16nm and below)
  • Knowledge of:
  • Low-power design flows (UPF/CPF)
  • Multi-voltage / multi-domain designs
  • Familiarity with physical verification tools (Calibre)

More information about NXP in India... #LI-7013 NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer, and more sustainable world through innovation. As the world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets. For more information, visit www.nxp.com Bright Minds. Bright Futures. We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills.

Commitment At NXP

We recognize NXP is a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality.

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