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NXP Semiconductors in Pune, India seeks a Physical Design Engineer (G2) to contribute to the implementation and signoff of complex SoC/IP blocks. You will handle floorplanning, CTS, routing, timing convergence, and PPA-focused signoff in advanced nodes, collaborating with RTL, DFT, packaging, and STA teams.
The role requires a Bachelors/Masters in Electronics or Microelectronics with 3–5 years of ASIC Physical Design experience, hands-on EDA tool proficiency, and scripting skills.
Job Summary NXP Semiconductors is seeking a Physical Design Engineer (G2) with strong fundamentals in physical design implementation to join our growing VLSI team. In this role, you will contribute to the implementation and signoff of complex SoC/IP blocks in advanced technology nodes, ensuring high-quality delivery aligned with NXP’s stringent PPA (Power, Performance, Area) and reliability standards.
More information about NXP in India... #LI-7013 NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer, and more sustainable world through innovation. As the world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets. For more information, visit www.nxp.com Bright Minds. Bright Futures. We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills.
We recognize NXP is a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality.