Physical Design engineer

NXP Semiconductors; Dadri; On-site; INR 1,800,000 - 3,200,000; Full time

Job summary

NXP Semiconductors in India is seeking a senior Physical Design engineer to collaborate with SoC cross-functional teams. You will develop and refine methodologies for low geometry nodes and lead flow definitions for Synthesis, UPF, verification, floor planning, power planning, and IO ring.

You will work with Cadence tools and EDA vendors to benchmark offerings and resolve blockers. Ideal candidates have 5–8 years of hands-on experience in SoC/IP Synthesis, UPF, and physical implementation

Qualifications

• Bachelor or Master in Electronics Engineering with VLSI specialization.
• 5–8 years hands-on experience in SoC/IP synthesis, UPF, verification, floor plan, power/IO, DRC/ERC/LVS/ESD.
• Proven experience delivering physical implementation closure for mixed-signal SoC with high-speed PHYs.

Responsibilities

• Define and develop Physical Design methodology for low geometry nodes.
• Cover tools/flow definition, requirement management for SoC and IP level Synthesis, UPF, formal verification, floor plan, power plan, IO ring, Place & Route, DRC, ERC, LVS, ESD analysis and defining analog/digital interface.
• Collaborate with EDA vendors to review tools, benchmark and drive tool selections.
• Ensure compliance with NXP design flow, methodologies and quality standards (ISO 9001, ISO 26262 and CMMI).
• Deploy new tools and implement flow improvements.
• Support ECO convergence with STA/ECO domains (PrimeTime, Tempus, Tweaker, PrimeClosure).

Skills

VLSI design

SoC/IP Synthesis

UPF & formal verification

Floor planning & power planning

Place & Route

DRC/ERC/LVS/ESD analysis

Scripting / automation

Technical leadership

Cross-functional collaboration

Education

Bachelor or Master in Electronics Engineering (VLSI specialization)

Tools

Cadence tools

Job description

Scope of Responsibilities

• As part of a large international R&D organization, you need to work closely with SoC cross functional teams to develop and define Physical Design methodology to meet SoC & IP level objectives on low geometry nodes (5/14/16/28/40nm).
• Your scope of work will cover tools and flow definition, requirement management for SoC and IP level Synthesis, UPF, formal verification, floor plan, power plan, IO ring, Place & Route, DRC, ERC, LVS, ESD analysis and defining analog / digital interface.
• You will work with EDA Vendors to proactively review latest tools and flows offerings in Physical Implementation domains, Evaluate latest offerings and benchmark with NXP used tools, flows and methodologies. Needs to drive decision for next set of selections. Work with EDA Vendors to review and resolve blocking issues.
• You will ensure the compliance of your deliveries to NXP design flow, methodologies and quality standards (ISO 9001, ISO 26262 and CMMI).
• You will be an actor of change for deploying new tools.

Scope of the work would cover STA flow/methodology development, continuous efficiency improvement, Flow development/Support for ECO convergence with tools in STA and ECO domain (PrimeTime, Tempus, Tweaker, PrimeClosure to name a few).

Specific skills & knowledge

• Bachelor or Master in Electronics Engineering and specialization in VLSI domain.
• 5-8 years of hands-on experience in SoC and IP level Synthesis, UPF, formal verification, floor plan, power plan, IO ring, Place & Route, DRC, ERC, LVS, ESD analysis and defining analog / digital interface.
• Proven experience in delivering physical implementation closure methodology of mixed signal SoC with high speed PHYs, IOs, PMU IP etc. closing analog / digital interfaces timing & signal integrity issues.
• Experience in Cadence tools, low geometry node issues, working with EDA team in reviewing & resolving blocking issues in project.
• Experience in customizing flows & methodology to meet low power & area objectives of SoC and leading team to execute on time.
• Ability to use scripting languages / automation of Physical Implementation methodology creation and deployment.
• Should have proven experience in demonstrating strong technical leadership to deliver on commitment, anticipation of challenges, assertive communication and excellent team player.
• Excellent communication skills with proven experience in international relationships.

More information about NXP in India... #LI-29f4

NXP Semiconductors N.V. (NASDAQ: NXPI) enables a smarter, safer, and more sustainable world through innovation. As the world leader in secure connectivity solutions for embedded applications, NXP is pushing boundaries in the automotive, industrial & IoT, mobile, and communication infrastructure markets. For more information, visit www.nxp.com Bright Minds. Bright Futures. We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills.

Commitment At NXP.

We recognize NXP is a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality.

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