Physical Design Engineer

Insemi Technology Services; Hyderabad, Bengaluru; On-site; INR 2,500,000 - 4,000,000; Full time

Benefits offered by this job

Advanced semiconductor projects

End-to-end ASIC PD exposure

Challenging VLSI tasks

Collaborative environment

Continuous learning

Career development in semiconductor

Job summary

Insemi Technology Services in Hyderabad, India seeks an experienced ASIC Physical Design engineer to drive end-to-end implementation for 7nm to 3nm technology nodes, with responsibilities spanning floorplanning, CTS, routing, and timing closure.

The role requires hands-on experience in block-level PD, IR Drop analysis, power integrity, and sign-off methodologies, collaborating with cross-functional teams to meet PPA targets and deliver optimized designs.

Qualifications

• Bachelor's or Master's degree in Electronics & Communication Engineering (ECE), Electrical Engineering, or a related field.
• Minimum 3+ years of experience in ASIC Physical Design.
• Strong understanding of Physical Design methodology and implementation flow.
• Hands-on experience with 7nm, 10nm, and/or 14nm technology nodes.
• Good knowledge of block-level floorplanning and IR Drop analysis.
• Experience in placement, Clock Tree Synthesis (CTS), routing, and timing closure.
• Proficiency in STA, timing analysis, and sign-off methodologies.
• Strong problem-solving, analytical, and debugging skills.
• Good communication skills and ability to work effectively in a team.

Responsibilities

• Perform end-to-end Physical Design implementation of ASIC designs.
• Work on advanced technology nodes, including 3nm, 5nm, and 7nm.
• Perform block-level floorplanning, power planning, placement, clock tree synthesis (CTS), and routing.
• Conduct IR Drop analysis and address power integrity issues.
• Perform block-level timing analysis, timing closure, and optimization.
• Ensure timing closure through effective setup and hold violation fixing.
• Coordinate with cross-functional teams to resolve design and implementation challenges.
• Perform timing sign-off and STA (Static Timing Analysis) closure.
• Ensure design meets PPA (Power, Performance, and Area) targets.

Skills

ASIC Physical Design

Timing closure

Problem solving

Team collaboration

Education

Bachelor's or Master's degree in Electronics & Communication Engineering (ECE), Electrical Engineering, or a related field

Tools

CTS (Clock Tree Synthesis)

STA (Static Timing Analysis)

IR Drop analysis

Job description

Role & responsibilities

• Perform end-to-end Physical Design implementation of ASIC designs.
• Work on advanced technology nodes, including 3nm, 5nm, and 7nm.
• Perform block-level floorplanning, power planning, placement, clock tree synthesis (CTS), and routing.
• Conduct IR Drop analysis and address power integrity issues.
• Perform block-level timing analysis, timing closure, and optimization.
• Ensure timing closure through effective setup and hold violation fixing.
• Coordinate with cross-functional teams to resolve design and implementation challenges.
• Perform timing sign-off and STA (Static Timing Analysis) closure.
• Ensure design meets PPA (Power, Performance, and Area) targets.

Preferred candidate profile

• Bachelor's or Master's degree in Electronics & Communication Engineering (ECE), Electrical Engineering, or a related field.
• Minimum 3+ years of experience in ASIC Physical Design.
• Strong understanding of Physical Design methodology and implementation flow.
• Hands-on experience with 7nm, 10nm, and/or 14nm technology nodes.
• Good knowledge of block-level floorplanning and IR Drop analysis.
• Experience in placement, Clock Tree Synthesis (CTS), routing, and timing closure.
• Proficiency in STA, timing analysis, and sign-off methodologies.
• Strong problem-solving, analytical, and debugging skills.
• Good communication skills and ability to work effectively in a team.

Perks and benefits

• Opportunity to work on advanced semiconductor technology nodes.
• Exposure to end-to-end ASIC Physical Design methodologies.
• Opportunity to work on challenging VLSI projects and cutting-edge technologies.
• Collaborative and technically driven work environment.
• Opportunities for continuous learning and professional growth.
• Career development opportunities in the semiconductor and VLSI domain.