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ACL Digital is seeking a PD EMIR Engineer in Bengaluru/Hyderabad to drive RTL-to-GDSII implementation for complex SoC blocks and full-chip designs with focus on performance, power, and area optimization and signoff closure.
The role requires hands-on experience with ASIC EMIR/PD flow, familiarity with Redhawk-SC, Redhawk-IR and EM Analysis tools, and scripting in Python/Perl/Shell, along with strong communication skills to collaborate with the Physical Design team.
Job Title: PD EMIREngineer
Location: Banglaore/Hyderabad
Employment Type: Full-time
Industry: Semiconductors / VLSI / ASIC Design
We are looking for a skilled and motivated PD EMIR Engineer to join our backend implementation team. The engineer will be responsible for RTL-to-GDSII implementation of complex SoC blocks or full-chip designs, targeting performance, power, and area (PPA) optimization and signoff closure.