PDN/EMIR Engineer

Allegis Group; Bengaluru; On-site; INR 1,200,000 - 2,100,000; Full time

Job summary

Allegis Group is hiring a PDN/EMIR Engineer in Bangalore. The role requires 3+ years of experience in PDN/EMIR closure on digital ASICs and deep knowledge of physical design flows affecting IR/EM. You will work with design teams to drive EMIR sign-off and IREM closure, leveraging Redhawk for analysis and validation.

The position invites hands-on debugging, close collaboration with physical design groups, and involvement in tape-in activities for multiple SoCs, ensuring robust EM performance.

Qualifications

• More than 3 years of experience in PDN/EMIR closure for digital ASICs.
• Strong knowledge of physical design flow and IR/EM implications.
• Experience with Redhawk and vector less testing approaches.
• Tape-in of multiple SoCs and EMIR signal integrity expertise.

Responsibilities

• Own SoC level IR drop, signal and power EM sign-off.
• Identify issues causing high EMIR, debug and provide solutions.
• Collaborate with physical design teams to drive IREM closure.

Skills

PDN/EMIR

IR drop

EM sign-off

Static analysis

Dynamic analysis

Tools

Redhawk

Job description

We are Hiring PDN/EMIR Engineer

Location: Bangalore, India

Experience: 3+ Years

Hiring for Product based company

Job Description

Top 3 skills: "More than 3 years of experience in PDN/EMIR closure in digital ASIC chips.
Preferred 8+ years or more years of experience,

• Own SoC level IR drop, Signal and power EM sign-off
• Identify issues causing high EMIR, debug and optimal provide solutions.
• Closely co-work with physical design team, to drive IREM closure"

JD: IREM

KEY RESPONSIBILITIES

• Own SoC level IR drop, Signal and power EM sign-off
• Identify issues causing high EMIR, debug and optimal provide solutions.
• Closely co-work with physical design team, to drive IREM closure

PREFERRED EXPERIENCE

• More than 3 years of experience in PDN/EMIR closure in digital ASIC chips. Preferred 8+ years or more years of experience
• Knowledgeable in physical design flow and impact of different aspects of designs causing IR EM issues
• Expert in usage of Redhawk tools for static/Dynamic analysis using vector less/vector approach and PG EM and Signal EM analysis,
• Involved in Tape-in of multiple SoCs